Journal of Electrical Engineering and Technology

The Korean Institute of Electrical Engineers (대한전기학회)
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Comparative Study on SVPWM Switching Sequences for VSIs

  • Vivek, G. (Department of Electrical Engineering, NIT Calicut India) ;
  • Biswas, Jayanta (Freelance Researcher India) ;
  • Nair, Meenu D. (Department of Electrical Engineering, NIT Calicut India) ;
  • Barai, Mukti (Department of Electrical Engineering, NIT Calicut India)
  • Received : 2017.09.26
  • Accepted : 2017.10.27
  • Published : 2018.01.01
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Abstract

Paper presents a comparative study of space vector pulse width modulation (SVPWM) switching sequences for Voltage Source Inverters (VSIs). Various SVPWM switching sequences are studied for two and three level VSIs in linear modulation index region. The computations of dwell times are presented for two and three level VSIs based on space vector geometry in a synchronized and optimized manner. The existing SVPWM switching sequences are implemented using Matlab / Simulink and in an experimental setup for three phase two and three level VSIs. The simulation and experimental waveforms of conventional SVPWM (CSVPWM) and bus clamped SVPWM (BCSVPWM) are demonstrated for two and three level inverter respectively. The performance of different SVPWM switching sequences are evaluated and presented based on weighted voltage total harmonic distortion (THD).

Keywords

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Fig. 1. Circuit diagram of three phase two level VSI

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Fig. 2. Space vector diagram of three phase two level VSI

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Fig. 3. Circuit diagram of three phase three level neutralpoint clamped VSI

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Fig. 4. (a) Space vector diagram of three phase three levelVSI (b) equivalent two level space vector

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Fig. 5. Timing diagram for signal generation

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Fig. 6. Simulation Results for Two level VSI (a) Polevoltage waveform (b) Line voltage waveform (c)Current waveform

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Fig. 7. Experimental Results for Two level VSI (a) Polevoltage waveform (b)Line voltage waveform (c)Current waveform

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Fig. 8 Simulation Results for Three level VSI (a) Polevoltage waveform (b) Line voltage waveform (c)Current waveform

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Fig. 9. Experimental results for Three level VSI (a) Polevoltage waveform (b) Line voltage waveform (c)Current waveform

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Fig. 10. (a) & (b) Performance evaluation of clamping andadvanced bus clamping strategies in two levelinverter, (c) & (d) Performance evaluation ofclamping and advanced bus clamping strategies inthree level inverter

Table 1. Switching table for three phase two level VSI

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Table 2. Switching sequence for three phase two level VSI

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Table 3. Switching table for three phase three level VSI

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Table 4. Switching Sequences for various triangles in sector I in three level SVPWM

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Table 5. Switching sequences for three phase three level VSI

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Table 6. Performance evaluation in two and three level inverter at modulation index=0.85 Pulse number = 15

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