Journal of Power Electronics

The Korean Institute of Power Electronics (전력전자학회)
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An Analysis of the Limit Cycle Oscillation in Digital PID Controlled DC-DC Converters

  • Chang, Changyuan (School of Integrated Circuits, Southeast University) ;
  • Hong, Chao (School of Integrated Circuits, Southeast University) ;
  • Zhao, Xin (School of Integrated Circuits, Southeast University) ;
  • Wu, Cheng'en (School of Integrated Circuits, Southeast University)
  • Received : 2016.08.09
  • Accepted : 2017.01.20
  • Published : 2017.05.20
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Abstract

Due to the wide use of electronic products, digitally controlled DC-DC converters are attracting more and more attention in recent years. However, digital control strategies may introduce undesirable Limit Cycle Oscillation (LCO) due to quantization effects in the Analog-to-Digital Converter (ADC) and Digital Pulse Width Modulator (DPWM). This results in decreases in the quality of the output voltage and the efficiency of the system. Meanwhile, even if the resolution of the DPWM is finer than that of the ADC, LCO may still exist due to improper parameters of the digital compensator. In order to discover how LCO is generated, the state space averaging model is applied to derive equilibrium equations of a digital PID controlled DC-DC converter in this paper. Furthermore, the influences of the parameters of the digital PID compensator, and the resolutions of the ADC and DPWM on LCO are studied in detail. The amplitude together with the period of LCO as well as the corresponding PID parameters are obtained. Finally, MATLAB/Simulink simulations and FPGA verifications are carried out and no-LCO conditions are obtained.

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References

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