JSTS:Journal of Semiconductor Technology and Science

  • 제17권2호
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  • Pages.167-173
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  • 2017
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  • 1598-1657(pISSN)
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  • 2233-4866(eISSN)
대한전자공학회 (The Institute of Electronics and Information Engineers)
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Characterization of the Vertical Position of the Trapped Charge in Charge-trap Flash Memory

  • Kim, Seunghyun (Department of Electrical and Computer Engineering with Inter-university Semiconductor Research Center (ISRC), Seoul National University) ;
  • Kwon, Dae Woong (Department of Electrical and Computer Engineering with Inter-university Semiconductor Research Center (ISRC), Seoul National University) ;
  • Lee, Sang-Ho (Department of Electrical and Computer Engineering with Inter-university Semiconductor Research Center (ISRC), Seoul National University) ;
  • Park, Sang-Ku (Department of Electrical and Computer Engineering with Inter-university Semiconductor Research Center (ISRC), Seoul National University) ;
  • Kim, Youngmin (Department of Electronics Engineering, Gachon University) ;
  • Kim, Hyungmin (Novachips) ;
  • Kim, Young Goan (Novachips) ;
  • Cho, Seongjae (Department of Electronics Engineering, Gachon University) ;
  • Park, Byung-Gook (Department of Electrical and Computer Engineering with Inter-university Semiconductor Research Center (ISRC), Seoul National University)
  • 투고 : 2016.07.26
  • 심사 : 2016.12.11
  • 발행 : 2017.04.30
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초록

In this paper, the characterization of the vertical position of trapped charges in the charge-trap flash (CTF) memory is performed in the novel CTF memory cell with gate-all-around structure using technology computer-aided design (TCAD) simulation. In the CTF memories, injected charges are not stored in the conductive poly-crystalline silicon layer in the trapping layer such as silicon nitride. Thus, a reliable technique for exactly locating the trapped charges is required for making up an accurate macro-models for CTF memory cells. When a programming operation is performed initially, the injected charges are trapped near the interface between tunneling oxide and trapping nitride layers. However, as the program voltage gets higher and a larger threshold voltage shift is resulted, additional charges are trapped near the blocking oxide interface. Intrinsic properties of nitride including trap density and effective capture cross-sectional area substantially affect the position of charge centroid. By exactly locating the charge centroid from the charge distribution in programmed cells under various operation conditions, the relation between charge centroid and program operation condition is closely investigated.

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참고문헌

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