Advances in nano research

  • 제5권1호
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  • Pages.61-67
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  • 2017
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  • 2287-237X(pISSN)
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  • 2287-2388(eISSN)
테크노프레스 (Techno-Press)
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An approach to model the temperature effects on I-V characteristics of CNTFETs

  • Marani, Roberto (Consiglio Nazionale delle Ricerche, Istituto di Studi sui Sistemi Intelligenti per l'Automazione) ;
  • Perri, Anna G. (Dipartimento di Ingegneria Elettrica e dell'Informazione, Laboratorio di Dispositivi Elettronici)
  • 투고 : 2016.11.10
  • 심사 : 2017.01.19
  • 발행 : 2017.03.25
⟨ 이전 논문 다음 논문 ⟩

초록

A semi-empirical approach to model the temperature effects on I-V characteristics of Carbon Nanotube Field Effect Transistors (CNTFETs) is proposed. The model includes two thermal parameters describing CNTFET behaviour in terms of saturation drain current and threshold voltage, whose values are extracted from the simulated and trans-characteristics of the device in different temperature conditions. Our results are compared with those of a numerical model online available, obtaining I-V characteristics comparable but with a lower CPU calculation time.

키워드

참고문헌

  1. Avouris, Ph., Radosavljevic, M. and Wind, S.J. (2005), "Carbon nanotube electronics and optoelectronic", in Appl. Physics of Carbon Nanotubes: Fundamentals of Theory, Optics and Transport Devices, eds. S.V. Rotkin & S. Subramone, Berlin Heidelberg, Springer-Verlag, pp. 1-25.
  2. Gelao, G., Marani, R., Diana, R. and Perri, A.G. (2011), "A semi-empirical SPICE model for n-type conventional CNTFETS", IEEE Trans. Nanotechnol., 10(3), 506-512. https://doi.org/10.1109/TNANO.2010.2049499
  3. Gelao, G., Marani, R., Pizzulli, L. and Perri, A.G. (2015a), "A model to improve analysis of CNTFET logic gates in Verilog-A-Part I: static analysis", Current Nanosci., 11(4), 515-526. https://doi.org/10.2174/1573413711666150320231414
  4. Gelao, G., Marani, R., Pizzulli, L. and Perri, A.G. (2015b), "A model to improve analysis of CNTFET logic gates in Verilog-A-Part II: dynamic analysis", Current Nanosci., 11(6), 770-783. https://doi.org/10.2174/1573413711666150624170310
  5. Javey, A., Kim, H., Brink, M., Wang, Q., Ural, A., Guo, J., Mcintyre, P., Mceuen, P., Lundstrom, M. and Dai, M. (2002), "High-Kdielectrics for advanced carbon nanotube transistors and logic gates", Nature Mater., 1, 241-246. https://doi.org/10.1038/nmat769
  6. Javey, A., Guo, J., Wang, Q., Lundstrom, M. and Dai, M. (2003), "Ballistic carbon nanotube field-effect transistors", Nature, 424, 654. https://doi.org/10.1038/nature01797
  7. Marani, R. and Perri, A.G. (2009), "CNTFET modelling for electronic circuit design", Electro Chem. Transact., 23(1), 429-437.
  8. Marani, R. and Perri, A.G. (2011), "A compact, semi-empirical model of carbon nanotube field effect transistors oriented to simulation software", Current Nanosci., 7(2), 245-253. https://doi.org/10.2174/157341311794653613
  9. Marani, R. and Perri, A.G. (2012), "A DC model of carbon nanotube field effect transistor for CAD applications", Int. J. Electro., 99(3), 427-444.
  10. Marani, R., Gelao, G. and Perri, A.G. (2012), "Comparison of ABM SPICE library with Verilog-A for compact CNTFET model implementation", Current Nanosci., 8(4), 556-565. https://doi.org/10.2174/157341312801784230
  11. Marani, R., Gelao, G. and Perri, A.G. (2013), "Modeling of carbon nanotube field effect transistors oriented to SPICE software for A/D circuit design", Microelectro. J., 44(1), 33-39. https://doi.org/10.1016/j.mejo.2011.07.012
  12. Marani, R. and Perri, A.G. (2016), "A DC thermal model of carbon nanotube field effect transistors for CAD applications", ECS J. Solid State Sci. Technol., 5(8), M3001-M3004.
  13. Naderi, A., Noorbakhsh, S.M. and Elahipanah, H. (2012), "Temperature dependence of electrical characteristics of carbon nanotube field effect transistors: A quantum simulation study", J. Nanomater., 2012, 1-7.
  14. Perri, A.G. (2011), 'Dispositivi Elettronici Avanzati', Progedit editor, Bari, Italy.
  15. Rahman, A., Wang, J., Guo, J., Liu, Y., Matsudaira, A., Ahmed, S., Datta, S. and Lundstrom, M. (2006), "FETToy", http://www.nanohub.org

피인용 문헌

  1. A Simulation Study of Basic Digital Circuits using Molecular Diodes vol.7, pp.3, 2017, https://doi.org/10.26634/jele.7.3.13559