Journal of Information Processing Systems

  • 제13권1호
  • /
  • Pages.95-103
  • /
  • 2017
  • /
  • 1976-913X(pISSN)
  • /
  • 2092-805X(eISSN)
한국정보처리학회 (Korea Information Processing Society)
권호 표지
DOI QR코드

DOI QR Code

Feasibility and Performance Analysis of RDMA Transfer through PCI Express

  • Choi, Min (Dept. of Information and Communication Engineering, Chungbuk National University) ;
  • Park, Jong Hyuk (Dept. of Computer Science, Seoul National University of Science and Technology)
  • 투고 : 2016.08.31
  • 심사 : 2016.12.28
  • 발행 : 2017.02.28
PDF 다운로드
⟨ 이전 논문 다음 논문 ⟩

초록

The PCI Express is a widely used system bus technology that connects the processor and the peripheral I/O devices. The PCI Express is nowadays regarded as a de facto standard in system area interconnection network. It has good characteristics in terms of high-speed, low power. In addition, PCI Express is becoming popular interconnection network technology as like Gigabit Ethernet, InfiniBand, and Myrinet which are extensively used in high-performance computing. In this paper, we designed and implemented a evaluation platform for interconnect network using PCI Express between two computing nodes. We make use of the non-transparent bridge (NTB) technology of PCI Express in order to isolate between the two subsystems. We constructed a testbed system and evaluated the performance on the testbed.

키워드

참고문헌

  1. Y. W. Kim, Y. Ren, and W. Choi, "Design and implementation of an alternate system interconnect based on PCI express," Journal of the Institute of Electronics and Information Engineers, vol. 52, no. 8, pp. 74-85, 2015. https://doi.org/10.5573/ieie.2015.52.8.074
  2. J. Liu, A. Mamidala, A. Vishnu, and D. K. Panda, "Evaluating InfiniBand performance with PCI express," IEEE Micro, vol. 25, no. 1, pp. 20-29, 2005. https://doi.org/10.1109/MM.2005.9
  3. H. Wong, "PCI express multi-root switch reconfiguration during system operation," Ph.D. dissertation, Department of Electrical Engineering and Computer, Massachusetts Institute of Technology, Cambridge, MA, 2011.
  4. L. Mohrmann, J. Tongen, M. Friedman, and M. Wetzel, "Creating multicomputer test systems using PCI and PCI express," in Proceedings of 2009 IEEE AUTOTESTCON, Anaheim, CA, 2009, pp. 7-10.
  5. J. Gudmundson, "Enabling multi-host system designs with PCI Express technology," 2004 [Online]. Available: http://www.rtcmagazine.com/articles/view/100015.%208.
  6. L. Chen, W. Zhou, and Q. Wu, "A design of high-speed image acquisition card based on PCI EXPRESS," in Proceedings of 2010 International Conference on Computer Application and System Modeling (ICCASM 2010), Taiyuan, China, 2010, pp. 551-554.
  7. Top500.org, "2015 Interconnect Family Statistics," [Online]. Available: http://top500.org/statistics/list.
  8. V. Krishnan, "Towards an integrated IO and clustering solution using PCI express," in Proceedings of 2007 IEEE International Conference on Cluster Computing, Austin, TX, 2007, pp. 259-266.
  9. L. Rota, M. Caselle, S. Chilingaryan, A. Kopmann, and M. Weber, "A new DMA PCIe architecture for Gigabyte data transmission," in Proceedings of 19th IEEE-NPSS Real Time Conference, Nara, Japan, 2014, pp. 1-2.
  10. H. Kavianipour and C. Bohm, "High performance FPGA-based scatter/gather DMA interface for PCIe," in Proceedings of IEEE Nuclear Science Symposium and Medical Imaging Conference (NSS/MIC), Anaheim, CA, 2012, pp. 1517-1520.