IEIE Transactions on Smart Processing and Computing

The Institute of Electronics and Information Engineers (대한전자공학회)
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Bit Flip Reduction Schemes to Improve PCM Lifetime: A Survey

  • Han, Miseon (School of Electrical and Computer Engineering, Korea University) ;
  • Han, Youngsun (Department of Electronic Engineering, Kyungil University)
  • Received : 2016.08.10
  • Accepted : 2016.09.29
  • Published : 2016.10.30
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Abstract

Recently, as the number of cores in computer systems has increased, the need for larger memory capacity has also increased. Unfortunately, dynamic random access memory (DRAM), popularly used as main memory for decades, now faces a scalability limitation. Phase change memory (PCM) is considered one of the strong alternatives to DRAM due to its advantages, such as high scalability, non-volatility, low idle power, and so on. However, since PCM suffers from short write endurance, direct use of PCM in main memory incurs a significant problem due to its short lifetime. To solve the lifetime limitation, many studies have focused on reducing the number of bit flips per write request. In this paper, we describe the PCM operating principles in detail and explore various bit flip reduction schemes. Also, we compare their performance in terms of bit reduction rate and lifetime improvement.

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