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Quantum Simulation Study on Performance Optimization of GaSb/InAs nanowire Tunneling FET

  • Hur, Ji-Hyun (Compound Device Laboratory, Samsung Advanced Institute of Technology) ;
  • Jeon, Sanghun (Department of Applied Physics, Korea University)
  • Received : 2016.01.25
  • Accepted : 2016.06.08
  • Published : 2016.10.30

Abstract

We report the computer aided design results for a GaSb/InAs broken-gap gate all around nanowire tunneling FET (TFET). In designing, the semi-empirical tight-binding (TB) method using $sp3d5s^*$ is used as band structure model to produce the bulk properties. The calculated band structure is cooperated with open boundary conditions (OBCs) and a three-dimensional $Schr{\ddot{o}}dinger$-Poisson solver to execute quantum transport simulators. We find an device configuration for the operation voltage of 0.3 V which exhibit desired low sub-threshold swing (< 60 mV/dec) by adopting receded gate configuration while maintaining the high current characteristic ($I_{ON}$ > $100 {\mu}A/{\mu}m$) that broken-gap TFETs normally have.

Keywords

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