Power Conditioning for a Small-Scale PV System with Charge-Balancing Integrated Micro-Inverter

Abstract

The photovoltaic (PV) power conditioning system for small-scale applications has gained significant interest in the past few decades. However, the standalone mode of operation has been rarely approached. This paper presents a two-stage multi-level micro-inverter topology that considers the different operation modes. A multi-output flyback converter provides both the DC-Link voltage balancing for the multi-level inverter side and maximum power point tracking control in grid connection mode in the PV stage. A modified H-bridge multi-level inverter topology is included for the AC output stage. The multi-level inverter lowers the total harmonic distortion and overall ratings of the power semiconductor switches. The proposed micro-inverter topology can help to decrease the size and cost of the PV system. Transient analysis and controller design of this micro-inverter have been proposed for stand-alone and grid-connected modes. Finally, the system performance was verified using a 120 W hardware prototype.

I. INTRODUCTION

Traditional large-scale power-generating stations connected to a central grid have several shortcomings because of the ever increasing demand for electrical power and its resulting complexity. Distributed Generation (DG) provides a solution for this problem because of its quick installation time unlike large-scale power stations and the added flexibility it provides to the system. DG also increases in the generation and transmission efficiency because it is located closer to consumers. Most research efforts in DG systems have mainly focused on sources with the least carbon footprints given that it has become an essential criterion for electrical power generation systems to minimize greenhouse gas emission levels. Photovoltaic (PV) solar power, wind turbine power, and fuel-cell power generation systems have become the essential research topics in this area because they have literally zero-carbon footprint [1], [2]. PV systems have higher longevity and lower operational costs among these sources because of the lack of mechanical movements and being devoid of fuel costs. Given the rapid growth in the PV system capacity and decrease in the PV panel prices, small-scale PV systems are obtaining a larger share in the market [3]-[7]. Although the PV panel costs have been largely decreased, the size and cost of the power conditioning system (PCS) that interfaces with the PV panels with the load/grid remains relatively high [7]-[10]. This work attempts to decrease the PCS size and cost used for the PV panels without compromising the IEEE standards.

The PCS for grid-connected PV systems are traditionally classified into three groups: centralized type, string type, and micro-inverters or module-integrated converters (MIC). Although the centralized and string types are suitable for large-scale PV systems, operating in optimal operating conditions during partially-shaded conditions is difficult. MIC systems are connected to each PV module separately, which allow them to achieve better energy conversion efficiency during partially-shaded conditions. These systems also have inherent advantages of manufacturing and installation costs from modularity unlike other types [11], [12]. PV micro-inverter systems can be divided into groups based on the number of converters used, such as single-stage, two-stage, or sometimes three-stage systems. A single-stage has only one converter that connects the PV module to the grid as the name suggests. Two-stage micro-inverter systems are generally preferred because of the wide range of PV voltage and reduction in the value of the power decoupling capacitor compared with single-stage systems [13]. However, the operation and control of micro-inverter-based systems in the standalone mode was rarely approached in literature. The PV system is stably connected to the grid under normal operating conditions. However, the standalone mode is sometimes necessary when a fault occurs in the grid and the local load should remain working (Fig. 1). In this case, one of the micro-inverter modules should maintain the AC bus stable in the normal range, whereas the other modules work in the grid-connection mode. This paper presents a small-scale PCS that uses a multi-level inverter with an integrated cell-balancer and analyzes it in both grid-connected and stand-alone operating modes. The controllers for both modes are then derived.

Fig. 1.Configuration of a PV system with parallel MIC modules connected to the grid and residential loads.

The operating principles of the newly suggested PV system architecture of the abovementioned multi-level inverter and flyback converter are explained in Section II. Consequently, the derivation and validation of the state-space averaged linear transfer functions for the converter stages that use small-signal modeling is shown in Section III. Section IV discusses the design procedure of the digital controller used for the stable operation of the system in stand-alone and grid-connected modes. The experimental setup and results of the hardware prototype are shown Section V. Section VI concludes this paper.

 

II. PROPOSED SMALL-SCALE PCS

A two-stage PCS generally consists of a DC–DC converter to boost the PV and an inverter that converts the boosted DC to an AC output connected to the grid or local loads. Figure 2 shows the schematic of the proposed small-scale PCS in a grid connection.

Fig. 2.Complete circuit diagram of the proposed two-stage multi-level PCS.

A. Multi-Output Flyback Converter

One of the main purposes of a pre-stage DC–DC converter is to boost the PV module voltage up to the DC-link so that the inverter can provide the AC output with the desired specifications. The DC–DC converter used for boosting the PV voltage can employ either an isolated or non-isolated converter. Given that the voltage should be balanced between the two input capacitors (C1 and C2) of the multi-level inverter, an active voltage balancing circuit becomes mandatory in this study. Active balancing circuits have been extensively used in electric vehicles to balance the voltage of individual batteries. They can be divided into two major groups, namely, magnetic-coupling and capacitive-coupling balancing methods. Among these circuits, the multi-output flyback converter has been selected for this two-stage converter scheme (Fig. 2). Flyback-based converter schemes have received positive reviews because of the fewer components and potential low cost [14]-[16]. The multi-winding transformer in the flyback provides not just isolation and energy transfer but also performs accurate voltage balancing.

The voltage balancing strategy becomes simple in the case of a multi-output flyback converter. By the same turns-ratio for the secondary and tertiary outputs in the transformer, the rectified voltage should balance each other regardless of the switch duty cycle. Fig. 2 shows that the secondary and tertiary windings balance the top capacitor (C1) and bottom capacitor (C2), respectively. This inductive-coupling multiple-secondary scheme helps to minimize the required components, which lowers the cost and size of the proposed small-scale PCS. Additionally, the maximum power point tracking (MPPT) for the PV module can be achieved using the multi-output flyback converter in grid-connected systems. The DC-link voltage for the inverter can be balanced from the inverter stage in grid-connected systems, which allows the application of the MPPT scheme through the multi-output flyback converter.

B. Multi-Level Inverter

Multi-level inverters are traditionally used in high-power industrial applications. However, they are increasingly used in renewable energy systems because of their inherent advantages over conventional two-level inverters [17–20]. Multi-level inverters produce a staircase output waveform with low distortion, so it aids in decreasing electromagnetic (EM) compatibility problems. It also draws the input current with low distortion and decreases the dv/dt stresses [21]. They can be operated in either fundamental frequency or high switching frequency pulse width modulation (PWM). A clear disadvantage of multi-level inverters is the utilization of a higher number of power switches compared with conventional H-bridge inverters. Although the voltage ratings are lower, the large number of switches increases the complexity of the gate driver circuit. Therefore, current multi-level studies have attempted to tackle this problem by proposing new multi-level inverter topologies. The current work selects a recently proposed multi-level inverter topology, which is a modified H-bridge topology with a 5-level output [22]. Unlike well-known multi-level topologies such as cascaded H-bridge and flying capacitor asymmetric H-bridge (FCAH), the selected topology is ideally suited for small-scale PCS. In contrast, previous topologies are designed for high-power applications that share the power transfer between the cascaded H-bridge modules. Fig. 3 shows a circuit diagram of the selected multi-level inverter with its output waveform. This topology has fewer switching components compared with conventional multi-level inverters with a 5-level output. This feature helps to lower the overall system cost and complexity of the gate driver circuit and controllers. Table I shows the comparison of the component number in each circuit. However, a drawback of the inverter topology is that because the average and instantaneous currents of SH and D are completely different, a reliable external voltage balancing circuit is necessary to maintain each of the capacitor voltages.

Fig. 3.Low-power multi-level inverter topology and output. (a) Modified H-bridge topology. (b) 5-level output voltage waveform.

TABLE ICOMPARISON OF THE NUMBER OF SWITCHING COMPONENTS IN DIFFERENT MULTI-LEVEL INVERTER TOPOLOGIES

Several modulation techniques have been used for the multi-level topologies such as space vector modulation, selective harmonic elimination, and sinusoidal PWM (SPWM). Among these, SPWM is one of the most simple and widely used modulation techniques. Instead of using the rudimentary form of SPWM technique, a technique combined with a modified unipolar switching strategy has been employed in this study [23]. An advantage of such a strategy is that one of the legs that contain two switches always operates at the fundamental frequency of the output, whereas the remaining three switches operate under the switching frequency (fsw). Fig. 4 shows each of the reference signals used in the PWM generation for individual switches. Each signal is derived from the fundamental sinusoidal waveform reference. The reference signals for switches S2 and S4 are inherently the complementary signals of S1 and S3, respectively. Notably, the frequency of PWM outputs for switches S3 and S4 is the fundamental frequency of the output. Thus, the leg (S3 and S4) always operates under the fundamental frequency of the output. This modulation effectively helps lower the switching losses that occur in the inverter and high-frequency EM interference (EMI) noises. The frequency modulation ratio (mf) was selected as an odd integer to lower the even-order harmonics in this strategy. Table II shows the switch state of all the individual switches that correspond to the output voltage levels.

Fig. 4.Reference signals used in the PWM generation of S1, S3, and SH.

TABLE IISWITCHING STATES OF THE INDIVIDUAL SWITCHES ACCORDING TO THE OUTPUT VOLTAGE LEVELS (1 = ON, 0 = OFF)

 

III. SYSTEM MODELLING

A. Grid-Connected Multi-Level Inverter Modeling

The grid-connected inverter is regulated by a two-loop control, such as an inner loop of the inductor current and outer loop of the DC-link voltage. The corresponding transfer functions should be first derived for the controller design. The state equations of the grid-connected modified H-bridge inverter can be obtained by examining the equivalent circuit in each operating mode. Fig. 5 depicts the current flow path and switching operation under different voltage levels. When the output voltage is zero, switches S2 and S4 are turned ON (mode 1). When the output voltage is VDC/2, the diode is forward biased and switches S1 and S4 are turned ON (mode 2). Similarly, when the output voltage is VDC, switches SH, S1, and S4 are turned ON (mode 3).

Fig. 5.Current flow according to the output voltage levels. (a) Mode 1(Vo = 0). (b) Mode 2 (Vo = VDC/2). (c) Mode 3 (Vo = VDC).

From each of the above diagrams, the state equations of the inductor current under different voltage levels are derived as follows:

When switch S1 is turned ON and the state-space averaging technique is applied, the control-to-inductor current transfer function is derived as follows:

where d1 is the duty applied to switch S1. Similarly, when the top switch SH is turned ON, the control-to-inductor current transfer function is derived as follows:

where d2 is the duty applied to switch SH. Eqs. (2) and (3) show that the input voltage VDC has a significant influence on the inductor current, but the inverter has a large capacitor at the input. Thus, we can assume that the voltage is constant.

The control-to-vDC should be derived for the outer loop controller design. The output power equals the input power in the case of an ideal inverter.

The input quantities vDC and iDC are the DC-link parameters, whereas the output quantities vo and io are rms values. The controllers are designed in such a way that the inner loop controller is always much faster than the outer loop controller. We assume that the output current tracks its reference without any error. Therefore, the output current is assumed to be the multiplication of the phase-lock-loop (PLL) output and control voltage.

where k is the scaling factor, and vcon is the control voltage from the outer loop controller. Eq. (6) is obtained using Eqs. (4) and (5).

The value of the modulation index M of the modified H-bridge inverter can be derived as follows:

where ri is the small-signal resistance of the input. Introducing the perturbation to the above Eqs. (5), (6), and (7), we can obtain Eqs. (8) and (9):

The small-signal model can be obtained from Eqs. (8) and (9) as shown in Fig. 6. The output small-signal resistance (ro) is given by the following:

Fig. 6.Small-signal circuit diagram of the inverter.

The small-signal circuit model shows that the expression for the control control-to-DC-link voltage (VDC) transfer function can be derived as Eq. (11):

B. Multi-Level Inverter Modelling under Standalone Mode

In the standalone operating condition, the flyback converter starts to regulate the DC-link voltage instead of the MPPT control. The following inverter also starts to generate the output AC voltage. The state equations of the modified H-bridge topology at each of the output levels are provided below.

The transfer functions of the control-to-output and control-to-inductor current are derived using the state-space averaging technique as shown in Eqs. (13) and (14), respectively.

The derived transfer functions can be validated by comparing them with the exact models in PSIM as shown in Fig. 7.

Fig. 7.Bode plots of Gvd and Gid. (a) Derived transfer function with MATLAB. (b) Numerical simulation PSIM.

C. Multi-Output Flyback Converter Modeling under Grid Connection

Similar to the modified H-bridge topology, the state equations of the multi-output flyback converter can be obtained by examining the current flow during switch ON and OFF conditions. The state equations when the switch is turned ON are shown in Eq. (15) as follows:

The state equations when the switch is turned OFF are shown in Eq. (16):

where VDC is the flyback converter output voltage. Using the state-space averaging technique, the linearized transfer function for the control-to-input voltage is derived as Eq. (17):

The derived linearized transfer function can be verified by comparing it with the bode plot of the exact model in PSIM. Fig. 8 shows the bode plots of the averaged model and exact model, which matching each other.

Fig. 8.Bode plot of Gvd. (a) Derived transfer function with MATLAB. (b) Numerical simulation by PSIM.

D. Flyback Converter Modeling under Standalone Operation

In the case of standalone operation, the function of the DC–DC converter is to provide a fixed DC-Link voltage to the multi-level inverter. The characteristics of the control-to-output voltage should be analyzed to develop the controller. Fig. 9 shows the equivalent circuit of the flyback converter with a single output in the standalone operation. The state equations can be derived from the equivalent circuit diagram as shown in Table III. The control-to-output transfer function is derived for the flyback converter shown in Eq. (18). The derived transfer function can be validated by comparing them with the averaged model plot in MATLAB and exact model plot in PSIM as shown in Fig. 10.

Fig. 9.Equivalent circuit diagram of the flyback converter with a PV source in standalone mode.

TABLE IIISTATE EQUATIONS OF THE FLYBACK CONVERTER

Fig. 10.Bode plot of Gvd. (a) Derived transfer function with MATLAB. (b) Numerical simulation by PSIM.

 

IV. CONTROLLER DESIGN

This section present the design process of the digital controllers used for the stable operation of the converter in standalone and grid-connected modes. The high-frequency PWM (fsw) was set at 20 kHz for both the flyback converter and multi-level inverter switches. The value of the input capacitor of the flyback converter was set as 300 μF to ensure that the PV module ripple voltage was less than 1%. The turn-ratio of the multi-output transformer was 1:3:3. The magnetizing inductance was twice the boundary value at 600 µH to ensure the CCM mode of operation in the flyback converter. The capacitor used for the DC-link voltage should lower the 120 Hz ripple to less than 5% of the DC-link voltage. The value of 600 µF was selected for both of the DC-link capacitors. Given that the output voltage of the multi-level inverter is a 5-level staircase waveform, the low values of 1.3 mH and 2 µF are sufficient for the inverter LC filters. The validated transfer functions derived in the previous sections are utilized to design the feedback controllers. The controller function H(s) is presented in continuous domain in Eq. (19). The bilinear transformation is applied to the controller function to obtain the digital form of the controllers shown in Eq. (20).

A. Standalone Mode

In the case of standalone operation, the flyback converter should provide a constant DC-link voltage independent from the operation of the multi-level inverter stage. This condition is achieved using a voltage loop PI controller. The DC-link voltage is fed back to the controller, and then the PI controller is used to eliminate the error voltage by varying the duty-cycle given to the switch of the flyback converter. The cut-off frequency of the controller was set at 50 Hz. The Kp and Ki values of the designed controller are 4396330.77 and 33817.751, respectively. Fig. 11 shows the closed loop performance of the designed controller. The control dynamics indicate the characteristics of the open-loop transfer function and designed controller, respectively. The red line indicates the closed loop performance of the flyback converter in standalone operation. The figure shows that the controller provides a 110° phase margin that guarantees the stability.

Fig. 11.Bode plot of the dynamic characteristics of the closed loop flyback converter. Gvd: control-to-output, H(s): Controller, Tv: Loop-gain.

In standalone mode, the multi-level inverter is controlled using a two-loop controller, inner-loop that controls the inductor current, and outer loop that controls the output voltage. The cut-off frequency of both the control loops was set at 3 kHz. Given that the digital controllers decrease the phase margin by the sample and hold effect, an excessive phase margin of 70 degrees was selected.

The designed PI control values for the inner and outer loops are Kp = 480000, Ki = 96000, and Kp = 768230, Ki = 2926242.6, respectively. Figs. 12(a) and 12(b) show the Bode plots of the inner and outer loop characteristics, respectively.

Fig. 12.Bode plot of the designed feedback loop. (a) Gid: control-to-inductor current, Hi(s): Inner loop controller, Ti: Inner loop-gain. (b) Gvd: control-to-output voltage, Outer loop controller, Tv: Outer loop-gain.

Three PWM signals are generated to control the inverter switches using the modified unipolar strategy in Table II. Fig. 13 shows the complete circuit diagram of the power stages with the digital controller in standalone mode.

Fig. 13.Circuit and controller diagram of the proposed two-stage multi-level inverter closed-loop PCS under standalone mode.

The controller was simulated in PSIM software to test its functionality. A reference of 110 VAC was selected for the load, whereas the DC-link reference was set at 200 V. The results show that the designed controllers successfully track each of the references as shown in Fig. 14. The flyback capacitors also have an equivalent voltage level (VDC1, VDC2), although the multi-level inverter draws the input current in imbalance between the switch (SH) and diode (D).

Fig. 14.Simulation result for the standalone control scheme. (a) 110 VAC reference vs. load voltage. (b) 200 V DC-Link voltage. (c) Top switch (SH) current. (d) Diode current.

B. Grid-Connected Mode

The focal point of the controller moves to the MPPT operation in case of a grid-connected operation. The DC-link voltage is fixed by the inverter stage in this mode. The MPPT algorithm is perturb-and-observe (P&O). PV-voltage control is used to track the reference provided by the P&O algorithm. The coefficients of the PI controller Kp and Ki were calculated as 224545.5 and 102066.12, respectively. Fig. 15 shows the closed-loop characteristics of the designed controller with a sufficient phase margin of 70° that guarantee the system stability. Fig. 16 shows the circuit diagram of the PCS with its controller scheme under grid connection. The parameters Vpv and Ipv are used to calculate the Vref in the P&O MPPT algorithm.

Fig. 15.Bode plot for the closed loop operation of the voltage loop PI controller for MPPT. Gvd: control-to-input voltage, H(s): Voltage controller, Tv: Loop-gain.

Fig. 16.Circuit and controller diagram of the closed-loop PCS in grid-connected mode with MPPT operation.

The controller of the inverter part includes a PLL, an outer voltage loop that regulates the DC-Link voltage, and an inner current loop for the output current control. Eqs. (3) and (11) show that design of the PI controllers for the voltage and current loops. The bode plots of both loops are shown in Fig. 17. The cut-off frequency of the current loop was set at 600 Hz, whereas the cut-off frequency of 5 Hz was selected for the voltage loop. The simulation results that verify the feasibility of the control design is presented in Fig. 18. The MPP voltage was located at 38 V, and 110 V is the grid voltage.

Fig. 17.Bode plots of the designed feedback loop gain. (a) Voltage loop Gvd: control-to-DC-link voltage, H(s)-Outer loop controller,Tv: Outer loop gain. (b) Current loop Gid: control-toinductor current, H(s)- Inner loop controller, Ti: Inner loop gain.

Fig. 18.Simulation results for the grid-connected control scheme. (a) Grid current, (b) grid voltage, (c) PV-source voltage (Vpv), MPP (38 V), and (d) balanced DC-Link capacitor voltages.

 

V. EXPERIMENTAL RESULTS

A 120 W hardware prototype was realized to verify the proposed charge-balancer integrated multi-level PV-PCS. The selected specifications for the hardware prototype are provided in Table IV. The inductance Lo is 1.3 mH, which is relatively smaller than that of conventional 2-level or 3-level inverters. Texas Instruments DSC TMS320F28335 was used to execute the designed controllers in the hardware prototype. Fig. 19 shows the 5-level inverter output voltage waveform. The step of the voltage level is even because of the flyback charge balancer. Fig. 20 shows a closed-loop result of the PCS under standalone operation with a 200 V DC-Link voltage and 110 V reference. The experimental data was collected from the oscilloscope and used to accurately calculate the THD value in the MATLAB FFT scope. Fig. 21 shows the measured THDs of the output voltage at 4.43%.

TABLE IVSPECIFICATIONS AND DESIGN OF THE HARDWARE PROTOTYPE

Fig. 19.5-level inverter output voltage.

Fig. 20.DC-link voltage (VDC) and load voltage (Vo) during the standalone operation.

Fig. 21.Calculation of the inverter hardware output voltage THD (4.43%) using MATLAB FFT scope.

A dual PV-array simulator (TerraSAS ELGAR) was used to emulate a real PV module (100W SM100-24). The module and array parameters, as well as the external conditions such as the solar radiation and temperatures, are all represented in the simulator. The simulator is remotely controlled by a desktop computer, whereas data acquisition is provided by the simulation software.

The PV system is tested under a changeable weather condition of constantly varying temperature and irradiance profiles to evaluate the MPPT and charge-balancing performance. Fig. 22 shows the variation of a cloudy dayprofile, including a time period from points (a) to (b), applied to test the hardware prototype. The time and voltage steps of the P&O algorithm were set as 0.1 sec and 2 V, respectively. The results in Fig. 23(a) show that the controller unit tracks the varying maximum power point rapidly and accurately, even under the fast-changing conditions of solar radiation and temperature over a period of 2 hours. Fig. 23(b) shows the short-time (250 seconds) variation of the PV voltage and current to check the MPPT performance of the controller that responds to the varying atmospheric conditions. The MPPT efficiency is almost 100% and at least 90%. Finally, Fig. 24 shows that the capacitor voltages share the partial DC-link voltage evenly.

Fig. 22.Temperature and irradiance parameters in the cloudy day profile.

Fig. 23.Experimental results of the MPPT controller during the cloudy day profile test. (a) Entire 2-hour period from (a) to (b) in Fig. 22. (b) Zoom-in waveforms in Fig. 23(a).

Fig. 24.Experimental results of the PV voltage and DC-Link voltage during the MPPT operation. The voltages VDC1 (200 V) and VDC2 (100 V) are well balanced during every step operation change in the PV voltage.

 

VI. CONCLUSION

This paper presents a two-stage micro-inverter system using an active voltage balancing circuit and recently proposed 5-level inverter topologies. The multi-output flyback converter lowers the cost and performs the MPPT control by confirming the voltage balancing operation of the DC-link capacitor voltages for the following multi-level inverter. The modified H-bridge topology uses fewer components compared with conventional topologies, which decreases the size and cost of the PCS. The staircase waveform from the multi-level inverter output helps in decreasing the values of the output filter components and mitigates high-frequency EMI.

The analysis and controller design for the proposed PCS scheme has been presented. The proposed scheme and derived controllers were verified using a 120 W hardware prototype. The MPPT operation for the grid-connected systems was verified by testing the prototype under a cloudy-day profile using a TerraSAS PV simulator. The MPPT efficiency remained above 95% in most of the testing times during the varying irradiance conditions. The designed controllers for standalone mode were also tested for the 120 W output. The DC-link capacitor voltages for the inverter stage were well balanced, and the AC output voltage waveform with 4.43% THD was achieved.