Journal of the Korea Society of Computer and Information (한국컴퓨터정보학회논문지)

Korean Society of Computer Information (한국컴퓨터정보학회)
권호 표지
DOI QR코드

DOI QR Code

Wear Leveling Technique using Bit Array and Bit Set Threshold for Flash Memory

  • Received : 2015.09.07
  • Accepted : 2015.10.28
  • Published : 2015.11.30
Download PDF
⟨ Previous Next ⟩

Abstract

Flash memory has advantages in that it is fast access speed, low-power, and low-price. Therefore, they are widely used in electronics industry sectors. However, the flash memory has weak points, which are the limited number of erase operations and non-in-place update problem. To overcome the limited number of erase operations, many wear leveling techniques are studied. They use many tables storing information such as erase count of blocks, hot and cold block indicators, reference count of pages, and so on. These tables occupy some space of main memory for the wear leveling techniques. Accordingly, they are not appropriate for low-power devices limited main memory. In order to resolve it, a wear leveling technique using bit array and Bit Set Threshold (BST) for flash memory. The proposing technique reduces the used space of main memory using a bit array table, which saves the history of block erase operations. To enhance accuracy of cold block information, we use BST, which is calculated by using the number of invalid pages of the blocks in a one-to-many mode, where one bit is related to many blocks. The performance results illustrate that the proposed wear leveling technique improve life time of flash memory to about 6%, compared with previous wear leveling techniques using a bit array table in our experiment.

Keywords

References

  1. Lee, Sungjin, and Jihong Kim. "Improving Performance and Capacity of Flash Storage Devices by Exploiting Heterogeneity of MLC Flash Memory." Computers, IEEE Transactions, Vol. 63, No. 10, pp. 2445-2458, Oct. 2014. https://doi.org/10.1109/TC.2013.120
  2. Chung, Tae-Sun, et al. "A survey of flash translation layer." Journal of Systems Architecture, Vol. 55, No. 5, pp. 332-343, May 2009. https://doi.org/10.1016/j.sysarc.2009.03.005
  3. Kwon, Se Jin, et al. "FTL algorithms for NAND-type flash memories." Design Automation for Embedded Systems, Vol. 15, No. 3-4, pp. 191-224, Dec. 2011. https://doi.org/10.1007/s10617-011-9071-9
  4. Ma, Dongzhe, Jianhua Feng, and Guoliang Li. "A survey of address translation technologies for flash memories." ACM Computing Surveys (CSUR), Vol. 46, No. 3, pp. 1-39, Jan. 2014.
  5. Jung-Hoon Lee. "Index block mapping for flash memory system", Journal of KSCI, Vol. 25, No. 8, pp. 23-30, Aug. 2010.(in Korean)
  6. Seon Hwan Kim, Jong Wook Kwak. "Garbage Collection Method using Proxy Block considering Index Data Structure based on Flash Memory", Journal of KSCI, Vol. 20, No. 6, pp. 1-11, Jun. 2015.(in Korean)
  7. Yang, Ming-Chang, et al. "Garbage Collection and Wear Leveling for Flash Memory: Past and Future." Smart Computing (SMARTCOMP), 2014 International Conference on. pp. 66-73, Nov. 2014.
  8. Chang, Yuan-Hao, Jen-Wei Hsieh, and Tei-Wei Kuo. "Improving flash wear-leveling by proactively moving static data." Computers, IEEE Transactions, Vol. 59, No. 1, pp. 53-65, Jan. 2010. https://doi.org/10.1109/TC.2009.134
  9. Chang, Li-Pin. "On efficient wear leveling for large-scale flash-memory storage systems." Proceedings of the 2007 ACM symposium on Applied computing. ACM, pp. 1126-1130, Mar. 2007.
  10. Chang, Li-Pin, and Li-Chun Huang. "A low-cost wear-leveling algorithm for block-mapping solid-state disks." ACM SIGPLAN Notices, Vol. 46, No. 5, pp. 31-40, Apr. 2011. https://doi.org/10.1145/2016603.1967683
  11. Murugan, Muthukumar, and David HC Du. "Rejuvenator: A static wear leveling algorithm for NAND flash memory with minimized overhead." Mass Storage Systems and Technologies (MSST), 2011 IEEE 27th Symposium on. IEEE, pp. 1-12, May 2011.
  12. Wang, Chundong, and Weng-Fai Wong. "Observational wear leveling: an efficient algorithm for flash memory management." Design Automation Conference (DAC), pp. 235-242, Jun. 2012.
  13. Kwon, Ohhoon, et al. "FeGC: An efficient garbage collection scheme for flash memory based storage systems." Journal of Systems and Software, Vol. 84, No. 9, pp. 1507-1523, Sep. 2011. https://doi.org/10.1016/j.jss.2011.02.042
  14. Yang, Ming-Chang, et al. "New ERA: new efficient reliability-aware wear leveling for endurance enhancement of flash storage devices." Design Automation Conference (DAC), Mar. 2013.