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Preparation and Properties of ZnSe/Zn3P2 Heterojunction Formed by Surface Selenization of Zn3P2 Film Deposited on ZnTe Layer

  • Park, Kyu Charn (Department of Materials Science and Engineering, Korea Advanced Institute of Science and Technology) ;
  • Cha, Eun Seok (Department of Materials Science and Engineering, Korea Advanced Institute of Science and Technology) ;
  • Shin, Dong Hyeop (Department of Materials Science and Engineering, Korea Advanced Institute of Science and Technology) ;
  • Ahn, Byung Tae (Department of Materials Science and Engineering, Korea Advanced Institute of Science and Technology) ;
  • Kwon, HyukSang (Department of Materials Science and Engineering, Korea Advanced Institute of Science and Technology)
  • Received : 2014.01.28
  • Accepted : 2014.02.19
  • Published : 2014.03.31

Abstract

ZnSe/$Zn_3P_2$ heterojunctions with a substrate configuration were fabricated using a series of cost-effective processes. Thin films of ZnTe and $Zn_3P_2$ were successively grown by close-spaced sublimation onto Mo-coated glass substrates. ZnSe layers thinner than 100nm were formed by annealing the $Zn_3P_2$ films in selenium vapor. Surface selenization generated a high density of micro-cracks which, along with voids, provided shunt paths and severely deteriorated the diode characteristics. Annealing the $Zn_3P_2$ film at $300^{\circ}C$ in a $ZnCl_2$ atmosphere before surface selenization produced a dense microstructure and prevented micro-crack generation. The mechanism of micro-crack generation by the selenization was described and the suppression effect of $ZnCl_2$ treatment on the micro-crack generation was explained. ZnSe/$Zn_3P_2$ heterojunctions with low leakage current ($J_0$ < $1{\mu}A/cm^2$) were obtained using an optimized surface selenization process with $ZnCl_2$ treatment. However, the series resistance was very high due to the presence of an electrical barrier between the ZnTe and $Zn_3P_2$ layers.

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