Journal of the Korea Society of Computer and Information (한국컴퓨터정보학회논문지)

Korean Society of Computer Information (한국컴퓨터정보학회)
권호 표지
DOI QR코드

DOI QR Code

Adaptive Frequency Scaling for Efficient Power Management in Pipelined Deep Packet Inspection Systems

파이프라인형 DPI 시스템에서 효율적인 소비전력 감소를 위한 동작주파수 설계방법

  • Kim, Han-Soo (Digital Technology and Biometry Division, National Forensic Service)
  • 김한수 (국립과학수사연구원 디지털분석과)
  • Received : 2014.08.27
  • Accepted : 2014.11.12
  • Published : 2014.12.31
Download PDF
⟨ Previous Next ⟩

Abstract

An efficient method for reducing power consumption in pipelined deep packet inspection systems is proposed. It is based on the observation that the number of memory accesses is dominant for the power consumption and the number of accesses drops drastically as the input goes through stages of the pipelined AC-DFA. A DPI system is implemented where the operating frequency of the stages that are not frequently used in the pipeline is reduced to eliminate the waste of power consumption. The power consumption of the proposed DPI system is measured upon various input character set and up to 25% of reduction of total power consumption is obtained, compared to those of the recent DPI systems. The method can be easily applied to other pipelined architecture and string searching applications.

여러 네트워크 보안기술 중 가장 효과적이고 신뢰할 수 있는 기술인 DPI 시스템에 쓰이는 파이프라인형 AC-DFA 구조에서, 효율적으로 전력 소모를 줄이는 방법을 제안하였다. 이는 메모리 접근 횟수가 전력 소모에 가장 큰 영향을 끼친다는 것과, 파이프라인형 AC-DFA의 스테이지 사용 횟수가 뒤쪽 스테이지로 갈수록 급격하게 감소한다는 관찰결과에 따른 것이다. 이에, 사용되지 않는 스테이지의 동작 클럭을 감소시켜 불필요하게 소모되는 전력을 줄이는 시스템을 구현하였다. 제안하는 방법을 적용한 DPI 시스템에 여러 종류의 문자열이 입력될 때의 전력 소모를 측정한 결과, 기존의 DPI 시스템에 비해 약 25 %의 전력 절감 효과를 가져왔다. 제안한 방법은 파이프라인형 DPI 구조 및 다중 패턴 문자열 검색의 어떤 응용에도 손쉽게 적용될 수 있을 것이다.

Keywords

References

  1. J. Wang, H. Kwon, Y. Jung, H. Kwak, and K. Chung, "A high performance IPS based on signature hashing," in Proceedings of Korea Computer Congress 2007, Vol. 34, No. 1(D), pp. 489-494.
  2. H. Kim, Y. Kim, and J. W. Jang, "Reduced power consumption via fewer memory accesses for deep packet inspection," Journal of Information Science and Engineering, Vol. 30, No. 3, May 2014, pp. 819-833.
  3. "Snort: network intrusion detection system," Sourcefire Inc., http://www.snort.org
  4. W. Jiang, Y. E. Yang, and V. K. Prasanna, "Scalable multi-pipeline architecture for high performance multi-pattern string matching," in Proceedings of IEEE International Conference on Parallel and Distributed Processing Symposium, 2010, pp. 1-12.
  5. A. V. Aho and M. J. Corasick, "Efficient string matching: an aid to bibliographic search," Communications of the ACM, Vol. 18, 1975, pp. 333-340. https://doi.org/10.1145/360825.360855
  6. T. Nishimura, S. Fukamachi, and T. Shinohara, "Speed-up of Aho-Corasick pattern matching machines by rearranging states," in Proceedings of the 8th IEEE International Symposium on String Processing and Information Retrieval, 2001, pp. 175-185.
  7. W. Jiang and V. K. Prasanna, "Reducing dynamic power dissipation in pipelined forwarding engines," in Proceedings of the 27th IEEE International Conference on Computer Design, 2009, pp. 144-149.
  8. A. Kennedy, X. Wang, Z. Liu, and B. Liu, "Low power architecture for high speed packet classification," in Proceedings of the 4th ACM/IEEE Symposium on Architectures for Networking and Communications Systems, 2008, pp. 131-140.
  9. Y. Kang, "The Internet traffic management and DPI," Broadcasting and Communications Policy, Vol. 25, No. 8, 2013, pp. 23-48.
  10. M. Kassner, "Deep packet inspection: what you need to know," TechRepublic, http://www.techrepublic.com/blog/data-center/deep-packet-inspection-what-you-need-to-know/
  11. M. Alicherry, M. Muthuprasanna, and V. Kumar, "High speed pattern matching for network IDS/IPS," in Proceedings of IEEE International Conference on Network Protocols, 2006, pp. 187-196.
  12. D. Pao, W. Lin, and B. Liu, "Pipelined architecture for multistring matching," Computer Architecture Letters, Vol. 7, 2008, pp. 33-36. https://doi.org/10.1109/L-CA.2008.5
  13. M. Pedram and J. Rabeay, "Power Aware Design Methodologies," Kluwer Academic Publishers, 2002, pp. 171-174 and pp. 386-412.
  14. S. B. Hyun, S. W. Kang and N. W. Eum, "Low power SoC technology wireless terminals," Electronics and Telecommunications Trends, Vol. 23, 2008, pp. 92-101.
  15. "Xilinx power estimator (XPE)," Xilinx Inc., http://www.xilinx.com
  16. "Samsung consumer DRAM," Samsung Electronics Co., Ltd., http://www.samsung.com/global/business/semiconductor/product/consumer-dram/catalogue
  17. "English fairy tales," Joseph Jacobs Page, PSU's Electronic Classics Site, http://www.hn.psu.edu/faculty/jmanis/jimspdf.htm