참고문헌
- S. Hussmann, T. Ringbeck, and B. Hagebeuker, "A performance review of 3D TOF vision systems in comparison to stereo vision systems," in Stereo Vision. Vienna, Austria: I-Tech Edu. Publ., ch. 7, pp. 103-120, 2008.
- 호요성, "다시점 카메라와 깊이 카메라를 이용한 3 차원 실감방송 콘텐츠 제작,"전자공학회지, 제38권 2호, pp. 44-49, 2011.
- Jongenelen, A.P.P., "Development of a Compact, Configurable, Real-time Range Imaging System," Ph.D dissertation. School of Eng. Victoria University of Wellington, 2010.
- S. Hussmann, T. Edeler, "Pseudo 4-phase shift algorithm for performance enhancement of 3D-TOF vision systems," IEEE Trans. Instrum. Meas., vol. 59, no. 5, pp. 1175-1181, May 2010. https://doi.org/10.1109/TIM.2010.2040881
- S.B. Gokturk, H. Yalcin, and C. Bamji, "A time-of-flight depth sensor, system description, issues and solutions," in Proc. IEEE Conf. Computer Vision and Pattern Recognition, Washington, DC, 2004.
- Jongenelen, A.P.P., Bailey, D.G., Payne, A.D., Carnegie, D.A., Dorrington, A.A., "Efficient FPGA Implementati on on Homodyne-Based Time-of-Flight Range Imaging," Journal of Real-Time Image Processing, Special Issue, 2010.
- Jongenelen, A.P.P., Carnegie, D.A., Dorrington, A.A., Payne, A.D., "Heterodyne Range Imaging in Real-time," Proceedings of International Conference on Sensing Technology, Tainan, pp. 57-62, 2008.
- J. E. Volder, "The CORDIC trigonometric computing technique," IRE Transactions on Electronic Computing, vol. EC-8, no. 3, pp. 330-334, 1959. https://doi.org/10.1109/TEC.1959.5222693
- R. Gutierrez, V. Torres, J. Valls, "FPGA-implementation of atan(Y/X) based on logarithmic transformation and LUT-based techniques," Journal of Systems Architecture, volume 56. issue 11, pp. 588-596, 2010. https://doi.org/10.1016/j.sysarc.2010.07.013
- M. Saber, Y. Jitsumatsu, T. Kohda, "A low- power implementation of arctangent function for communication application using FPGA," Fourth International Workshop on Signal Design and its Applications in Communications (IWSDA'09), pp. 60-63, 2009.
- B.Lakshmi and A.S. Dhar, "CORDIC Architec- tures: A Survey," in Hindawi Publishing Corporation, VLSI Design, Volume 2010, Article ID 794891, 19 pages, 2010.
- Richard P. Brent, H.T. Kung, "A Regular Layout for Parallel Adders," IEEE Transactions on Computers, vol. C-31, no. 3, pp. 260-264, 1982. https://doi.org/10.1109/TC.1982.1675982
- Raphael A. Camponogara Viera, Paulo Cesar C. de Aguirre, Leonardo Londero de Oliveira and Joao Baptista Martins, "Iterative Mode Hardware Implementation of CORDIC Algorithm," in Proceeding of the 26th South Symposium on Microelectronics (SIM 2011), 2011.
- D. Ghai, K. Singh, "Comparative Analysis of Various CORDIC Techniques," M.S dissertation. Department of Electronic and Communications Engineering Thapar University, Patiala-137004, India, 2011.
- D.-M. Ross, S. Miller, M. Sima, and C. Crawford, "Design Rules for Implementing CORDIC on FPGAs," in Proceedings of the 13th IEEE Pacific Rim Conference on Commu- nications, Computers and Signal Processing (PacRim 2011). Victoria, B.C., Canada, pp. 797-802, 2011.
피인용 문헌
- Differential CORDIC-based High-speed Phase Calculator for 3D Depth Image Extraction from TOF Sensor vol.18, pp.3, 2014, https://doi.org/10.6109/jkiice.2014.18.3.643