Journal of Satellite, Information and Communications (한국위성정보통신학회논문지)

Korea Society of Satellite Technology (한국위성정보통신학회)
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Improvements of Extended Drain NMOS (EDNMOS) Device for Electrostatic Discharge (ESD) Protection of High Voltage Operating LDI Chip

고전압용 LDI 칩의 정전기 보호를 위한 EDNMOS 소자의 특성 개선

  • 양준원 (세한대학교 컴퓨터교육과) ;
  • 서용진 (세한대학교 나노정보소재연구소)
  • Received : 2012.07.16
  • Accepted : 2012.09.21
  • Published : 2012.09.30
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Abstract

High current behaviors of the extended drain n-type metal-oxide-semiconductor field effects transistor (EDNMOSFET) for electrostatic discharge (ESD) protection of high voltage operating LDI (LCD Driver IC) chip are analyzed. Both the transmission line pulse (TLP) data and the thermal incorporated 2-dimensional simulation analysis demonstrate a characteristic double snapback phenomenon after triggering of biploar junction transistor (BJT) operation. Also, background doping concentration (BDC) is proven to be a critical factor to affect the high current behavior of the EDNMOS devices. The EDNMOS device with low BDC suffers from strong snapback in the high current region, which results in poor ESD protection performance and high latchup risk. However, the strong snapback can be avoided in the EDNMOS device with high BDC. This implies that both the good ESD protection performance and the latchup immunity can be realized in terms of the EDNMOS by properly controlling its BDC.

본 논문에서는 ESD 방지를 위한 최적 방법론에 목표하여 확장된 드레인을 갖는 EDNMOS 소자의 더블 스냅백 현상 및 백그라운 도핑 농도 (BDC)의 영향을 조사하였다. 고전류 영역에서 낮은 BDC를 가진 EDNMOS 소자는 강한 스냅백으로 인해 취약한 ESD 성능과 높은 래치업 위험을 가지게 되나, 높은 BDC를 가진 EDNMOS 소자는 스냅백을 효과적으로 방지할 수 있음을 알 수 있었다. 따라서 BDC 제어로 안정적인 ESD 방지 성능과 래치업 면역을 구현할 수 있음을 밝혔다.

Keywords

References

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