참고문헌
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${\mu}m$ digital CMOS," in Proc. IEEE CICC, pp.337-340. Sep., 2007. - Huseyin Dinc and Phillip E. Allen, "A 1.2 GSample/s Double-Switching CMOS THA With-62 dB THD," IEEE J. Solid-State Circuits, Vol.44, No.3, pp.848-861, Mar., 2009. https://doi.org/10.1109/JSSC.2008.2010786
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${\mu}m$ CMOS," IEEE J. Solid-State Circuits, Vol.36, No.12, pp.1847-1858, Dec., 2001. https://doi.org/10.1109/4.972135 - Govert Geelen and Edward Paulus, "An 8b 600 MS/s 200 mW CMOS folding A/D Converter Using an Amplifier Preset Technique," in ISSCC Dig. Tech. Papers, pp.254-256, Feb., 2004.
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피인용 문헌
- An 8-b 1GS/s Fractional Folding CMOS Analog-to-Digital Converter with an Arithmetic Digital Encoding Technique vol.13, pp.5, 2013, https://doi.org/10.5573/JSTS.2013.13.5.473
- A 45 nm 9-bit 1 GS/s High Precision CMOS Folding A/D Converter with an Odd Number of Folding Blocks vol.14, pp.4, 2014, https://doi.org/10.5573/JSTS.2014.14.4.376