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Characterization of Electrical Resistance for SABiT Technology-Applied PCB : Dependence of Bump Size and Fabrication Condition

SABiT 공법적용 인쇄회로기판의 은 페이스트 범프 크기 및 제작 조건에 따른 전기 저항 특성

  • 송철호 (부산대학교 나노융합기술학과) ;
  • 김영훈 (부산대학교 나노융합기술학과) ;
  • 이상민 (부산대학교 나노융합기술학과) ;
  • 목지수 (삼성전기 기판사업부 기판선행개발팀) ;
  • 양용석 (부산대학교 나노융합기술학과)
  • Published : 2010.04.01

Abstract

We investigated the resistance change behavior of SABiT (Samsung Advanced Bump interconnection Technology) technology-applied PCB (Printed Circuit Board) with the various bump sizes and fabrication conditions. Many testing samples with different bump size, prepreg thickness, number of print on the formation of Ag paste bump, were made. The resistance of Ag paste bump itself was calculated from the Ag paste resistivity and bump size, measured by using 4-point probe method and FE-SEM (Field Emission Scanning Electron Microscope), respectively. The contact resistance between Ag paste bump and conducting Cu line were obtained by subtracting the Cu line and bump resistances from the measured total resistance. It was found that the contact resistance drastically changed with the variation of Ag paste bump size and the contact resistance had the largest influence on total resistance. We found that the bump size and contact resistance obeyed the power law relationship. The resistance of a circuit in PCB can be estimated from this kind of relationship as the bump size and fabrication technique vary.

Keywords

References

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