Journal of information and communication convergence engineering

  • 제8권5호
  • /
  • Pages.570-574
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  • 2010
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  • 2234-8255(pISSN)
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  • 2234-8883(eISSN)
한국정보통신학회 (The Korea Institute of Information and Commucation Engineering)
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Thinning Processor for 160 X 192 Pixel Array Fingerprint Recognition

  • Jung, Seung-Min (Department of Information Science and Telecommunications Eng., Hanshin University)
  • 투고 : 2010.07.29
  • 심사 : 2010.08.27
  • 발행 : 2010.10.30
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초록

A thinning algorithm changes a binary fingerprint image to one pixel width. A thinning stage occupies 40% cycle of 32-bit RISC microprocessor system for a fingerprint identification algorithm. Hardware block processing is more effective than software one in speed, because a thinning algorithm is iteration of simple instructions. This paper describes an effective hardware scheme for thinning stage processing using the Verilog-HDL in $160\times192$ Pixel Array. The ZS algorithm was applied for a thinning stage. The hardware scheme was designed and simulated in RTL. The logic was also synthesized by XST in FPGA environment. Experimental results show the performance of the proposed scheme.

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참고문헌

  1. Seung-Min. Jung, J.M. Nam, D.H. Yang, and M.K Lee "A CMOS Integrated Capacitive Fingerprint Sensor with 32-bit RISC Microcontroller,'' IEEE Journal of Solid-State Circuits, vol. 40, no. 8, pp. 1745-1750, Aug. 2005. https://doi.org/10.1109/JSSC.2005.852019
  2. Lin Hong, Yifei Wan, and Anil Jain, "Fingerprint Image Enhancement: Algorithm and Performance Evaluation," IEEE Transactions on Pattern Analysis and Machine Intelligence, Vol. 20, No. 8, pp. 777-789, August 1998. https://doi.org/10.1109/34.709565
  3. T. Y. Zhang and C. Y. Suen, "A fast parallel algorithm for thinning digital patterns", Communications of the ACM, vol. 27, no. 6, pp. 236-239, Mar. 1984. https://doi.org/10.1145/357994.358023
  4. Y. Y. Zhang, "Redundancy parallel thinning," Pattern Recognition Letters, vol. 18, no. 1, pp. 27-35, Jan. 1997. https://doi.org/10.1016/S0167-8655(96)00127-4
  5. Jun-Sik Kwon, "Obtaining 1-pixel Width Line Using an Enhanced Parallel Thinning Algorithm," Journal of IEEK, Vol. 46- SP., No. 1, January 2009.
  6. Lei Huang, Genxun Wan, Changping Liu, "An Improved Parallel Thinning Algorithm," Proceedings of the Seventh International Conference on Document Analysis and Recognition (ICDAR 2003), 2003.