Journal of the Korean Institute of Electrical and Electronic Material Engineers (한국전기전자재료학회논문지)

The Korean Institute of Electrical and Electronic Material Engineers (한국전기전자재료학회)
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Reliability on Accelerated Soft Error Rate in Static RAM of Thin Film Transistor Type

소프트 에러율에 대한 박막 트랜지스터형 정적 RAM의 신뢰성

  • 김도우 (한국폴리텍여자대학 디지털디자인과) ;
  • 왕진석 (충남대학교 전자공학과)
  • Published : 2006.06.01
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Abstract

We investigated accelerated soft error rate (ASER) in static random access memory (SRAM) cells of thin film transistor (TFT) type. The effects on ASER by cell density, buried nwell structure, operational voltage, and polysilicon-2 layer thickness were examined. The increase in the operational voltage, and the decrease in the density of SRAM cells, respectively, resulted in the decrease of ASER values. The SRAM chips with buried nwell showed lower ASER than those with normal well structure did. The ASER decreased as the test distance from alpha source to the sample increased from $7{\mu}m\;to\;15{\mu}m$. As the polysilicon-2 thickness increased up to $1000\;{\AA}$, the ASER decreased exponentially. In conclusion, the best condition for low soft error rate, which is essential to obtain highly reliable SRAM device, is to apply the buried nwell structure scheme and to fabricate thin film transistors with the thick polysilicon-2 layer

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References

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