Progress in Superconductivity
- 제7권2호
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- Pages.109-113
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- 2006
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- 1229-4764(pISSN)
초전도 Pipelined Multi-Bit ALU에 대한 연구
Study of the Superconductive Pipelined Multi-Bit ALU
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Kim, Jin-Young
(University of Incheon) ;
- Ko, Ji-Hoon (University of Incheon) ;
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Kang, Joon-Hee
(University of Incheon)
- 발행 : 2006.04.01
초록
The Arithmetic Logic Unit (ALU) is a core element of a computer processor that performs arithmetic and logic operations on the operands in computer instruction words. We have developed and tested an RSFQ multi-bit ALU constructed with half adder unit cells. To reduce the complexity of the ALU, We used half adder unit cells. The unit cells were constructed of one half adder and three de switches. The timing problem in the complex circuits has been a very important issue. We have calculated the delay time of all components in the circuit by using Josephson circuit simulation tools of XIC,