정적 RAM 셀 특성에 따른 소프트 에러율의 변화

Study of Accelerated Soft Error Rate for Cell Characteristics on Static RAM

  • 발행 : 2006.03.01

초록

We investigated accelerated soft error rate(ASER) in 8M static random access memory(SRAM) cells. The effects on ASER by well structure, operational voltage, and cell transistor threshold voltage are examined. The ASER decreased exponentially with respect to operational voltage. The chips with buried nwell1 layer showed lower ASER than those either with normal well structure or with buried nwell1 + buried pwell structure. The ASER decreased as the ion implantation energy onto buried nwell1 changed from 1.5 MeV to 1.0 MeV. The lower viscosity of the capping layer also revealed lower ASER value. The decrease in the threshold voltage of driver or load transistor in SRAM cells caused the increase in the transistor on-current, resulting in lower ASER value. We confirmed that in order to obtain low ASER SRAM cells, it is necessary to also the buried nwell1 structure scheme and to fabricate the cell transistors with low threshold voltage and high on-current.

키워드

참고문헌

  1. Paul M, Carter and Brian R. Wilkins, IEEE J. Solid-State Circuits vol. SC-22, 3, pp. 430-463, June, 1987 https://doi.org/10.1109/JSSC.1987.1052743
  2. D. Burnett, C. Lage, and A.Borrman, IRPS, 156-160, 1993 https://doi.org/10.1109/RELPHY.1993.283330
  3. C. Lage, D. Burnett, T. McNelly, K. Baker, A. Bormann, D. Dreier, V. Soorholtz, IEEE IEDM Tech. Dig., 821-824, 1993 https://doi.org/10.1109/IEDM.1993.347273
  4. T.C. May and M. H. Woods, IEEE Trans. Electron Devices, vol. ED-26, pp. 2-9, January, 1989 https://doi.org/10.1109/T-ED.1979.19370
  5. D. W. Kim, M. K. Gong, J. S. Wang, KIEE International Transaction on EA, vol. 3-C, no. 1, p. 15-18, 2003
  6. E. Takeda, K. Takeuchi, D. Hisamoto, T. Toyabe, K. Oshima, and K. Itoh, IEEE Trans. Electron Devices, vol. 36, pp. 2567-2575, November, 1989 https://doi.org/10.1109/16.43681
  7. Larry D. Edmonds, IEEE Transactions on Nuclear Science, vol. 38, 2, 828-833, April, 1991 https://doi.org/10.1109/23.289396
  8. P. Hazucha, et al, IEEE IEDM Tech. Dig., 523-526, 2003 https://doi.org/10.1109/IEDM.2003.1269336
  9. Sai-Wai Fu, Amr M. Mohsen, and Tim C. May, IEEE Transactions on Electron Devices vol. ED-32, 1, 49-54, January, 1985 https://doi.org/10.1109/T-ED.1985.21908
  10. Barbara Chappell, Stanley E. Schuster, George A. Sai-Halasz, IEEE Transactions on Electron Devices vol. ED-32, 2, 463, February, 1985 https://doi.org/10.1109/T-ED.1985.21964