Journal of Information Processing Systems

  • 제2권3호
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  • Pages.153-158
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  • 2006
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  • 1976-913X(pISSN)
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  • 2092-805X(eISSN)
한국정보처리학회 (Korea Information Processing Society)
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Design of an Image Interpolator for Low Computation Complexity

  • 발행 : 2006.12.31
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초록

In this paper, we propose an image interpolator for low computational complexity. The proposed image interpolator supports the image scaling using a modified cubic convolution interpolation between the input and output resolutions for a full screen display. In order to reduce the computational complexity, we use the difference in value of the adjacent pixels for selecting interpolation methods and linear function of the cubic convolution. The proposed image interpolator is compared with the conventional one for the computational complexity and image quality. The proposed image interpolator has been designed and verified by Verilog HDL(Hardware Description Language). It has been synthesized using the Xilinx VirtexE FPGA, and implemented using an FPGA-based prototype board.

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참고문헌

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  9. Y. H. Jun, J. H. Yun, and M. R. Choi, 'Modified Cubic Convolution Interpolation for Low Computational Complexity,' IMID/IDMC 2006, pp. 1293-1296, 2006

피인용 문헌

  1. A low-cost media quality enhancement resolution up-conversion for mobile cloud vol.73, pp.7, 2017, https://doi.org/10.1007/s11227-017-1988-8