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Fabrication and Characterization of Thermal Probe Array on SOI Substrates

SOI 기판을 이용한 Thermal Probe 어레이 제작 및 특성 평가

  • 조주현 (충북대학교 반도체공학과) ;
  • 나기열 (충북대학교 반도체공학과) ;
  • 박근형 (충북대학교 반도체공학과) ;
  • 이재봉 (충북대학교 반도체공학과) ;
  • 김영석 (충북대학교 반도체공학과)
  • Published : 2005.11.01

Abstract

This paper reports the fabrication and characterization of $5\;\times\;5$ thermal cantilever array for nano-scaled memory device application. The $5\;\times\;5$ thermal cantilever array with integrated tip heater has been fabricated with MEMS technology on SOI wafer using 7 photo masking steps. All single-level cantilevers have a diode in order to eliminate any electrical cross-talk between adjacent tips. Electrical measurements of fabricated thermal cantilever away show its own thermal heating mechanism. Thermal heating is demonstrated by the reflow of coated photoresist on the cantilever array surface.

Keywords

References

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