DOI QR코드

DOI QR Code

Nature of Surface and Bulk Defects Induced by Epitaxial Growth in Epitaxial Layer Transfer Wafers

  • Kim, Suk-Goo (Department of Electrical and Computer Engineering, Nano-SOI Process Laboratory, Hanyang University) ;
  • Park, Jea-Gun (Department of Electrical and Computer Engineering, Nano-SOI Process Laboratory, Hanyang University) ;
  • Paik, Un-Gyu (Department of Ceramic Engineering, Hanyang University)
  • Published : 2004.08.01

Abstract

Surface defects and bulk defects on SOI wafers are studied. Two new metrologies have been proposed to characterize surface and bulk defects in epitaxial layer transfer (ELTRAN) wafers. They included the following: i) laser scattering particle counter and coordinated atomic force microscopy (AFM) and Cu-decoration for defect isolation and ii) cross-sectional transmission electron microscope (TEM) foil preparation using focused ion beam (FIB) and TEM investigation for defect morphology observation. The size of defect is 7.29 urn by AFM analysis, the density of defect is 0.36 /cm$^2$ at as-direct surface oxide defect (DSOD), 2.52 /cm$^2$ at ox-DSOD. A hole was formed locally without either the silicon or the buried oxide layer (Square Defect) in surface defect. Most of surface defects in ELTRAN wafers originate from particle on the porous silicon.

Keywords

References

  1. T. Eimori, T. Oashi, F. Morishita, T. Iwamatsu, Y. Yamaguchi, F. Okuda, K. Shimomura, H. Shimano, N. Sakashita, K. Arimoto, Y. Inoue, S. Komori, M. Inuishi, T. Nishimura, and H. Hiyoshi, 'Approaches to extra low voltage DRAM operation by SOIDRAM', IEEE Trans. Electron Devices 45, 1000, 1998
  2. P. K. Vasudev, 'CMOS device and interconnect technology enhancements for low power/low voltage applications', Solid-State Electron. 39, p. 481,1996 https://doi.org/10.1016/0038-1101(95)00164-6
  3. J. P. Colinge, 'Silicon-On-Insulator-Technology: Materials to VLSI', Kluwer, Academic, Boston, 1991
  4. A. J. Auberton-Herve, T. Barge, F. Metral, M. Bruel, B. Aspar, and H. Moreceau, 'Silicon on Insulator Wafers using the Smart cut® Technology', ECS PV 98-1, p. 1341, 1998
  5. H. Aga, M. Nakano, and K. Mitani, 'Study of HF defects in thin, bonded silicon-on-insulator dependent on original wafers', Jpn. J. Appl. Phys., 38, p. 2694, 1999 https://doi.org/10.1143/JJAP.38.2694
  6. K. Sakaguchi, K. Yanagita, H. Kurisu, H. Suzuki, K. Ohmi, and T. Yonehara, "$Eltran^\circledR$ by Splitting Porous Si layers', ECS PV., 99-3, p. 117, 1999
  7. N. Sato, K. Sakaguci, K. Yamagata, Y. Fujiyama, and T. Yonehara, 'Epitaxial Growth on Porous Si for a New Bond and Etch-back Silicon-onInsulator', J. Electrochem. Soc. 142, p. 3116, 1995 https://doi.org/10.1149/1.2048698
  8. A. Matsumura, K. Kawamura, I. Hamaguchi, S. Takayama, T. Yano, and Y. Nagatake, 'Low-dose SIMOX wafers for LSIs fabricated with intemal-thermal- oxidation (ITOX) process: electrical characterization",J. Mater. Sci. 10, p. 365, 1999
  9. A. Ogura, 'Novel SIMOX with BOX at Damage Peak', ECS PV 99-3, p. 61, 1999
  10. K. Sakaguchi, N. Sato, K. Yamagata, T. Atoji, Y. Fujiyama, J. Nakayama, and T. Yonehara, 'Current Progress in Epitaxial Layer Transfer($ELTRAN^\circledR$', IEICE Trans. Electron Devices E80 C, p. 378, 1997
  11. T. Yonehara, K. Sakaguchi, and N. Sato, 'Eltran Epitaxial Layer Transfer', ECS PV 99-3, p. 111, 1997