한국전기전자재료학회논문지 (Journal of the Korean Institute of Electrical and Electronic Material Engineers)

  • 제17권8호
  • /
  • Pages.799-805
  • /
  • 2004
  • /
  • 1226-7945(pISSN)
  • /
  • 2288-3258(eISSN)
한국전기전자재료학회 (The Korean Institute of Electrical and Electronic Material Engineers)
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Dual Gate Emitter Switched Thyristor의 Latch-up 전류 특성

Characteristics of Latch-up Current of the Dual Gate Emitter Switched Thyristor

  • 이응래 (충북대학교 전기전자공학부) ;
  • 오정근 (충북대학교 전기전자공학) ;
  • 이형규 (충북대학교 전기전자공학) ;
  • 주병권 (한국과학기술연구원 마이크로시스) ;
  • 김남수 (충북대학교 전기전자공학부)
  • 발행 : 2004.08.01
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초록

Two dimensional MEDICI simulator is used to study the characteristics of latch-up current of Dual Gate Emitter Switched Thyristor. The simulation is done in terms of the current-voltage characteristics, latch-up current density, ON-voltage drop and electrical property with the variations of p-base impurity concentrations. Compared with the other power devices such as MOS Controlled Cascade Thyristor(MCCT), Conventional Emitter Switched Thyristor(C-EST) and Dual Channel Emitter Switched Thyristor(DC-EST), Dual Gate Emitter Switched Thyristor(DG-EST) shows to have the better electrical characteristics, which is the high latch-up current density and low forward voltage-drop. The proposed DG-EST which has a non-planer p-base structure under the floating $N^+$ emitter indicates to have the better characteristics of latch-up current and breakover voltage.

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참고문헌

  1. IEEE int. Electron Devices Meeting Dig The insulated gate transistor B.J.Baliga;M.S.Adler;P.V.Gray;R.Love;N.Zommer
  2. IEDM Tech. dig. MOS-Controlled Thyristors V. A. K. Temple
  3. IEEE Trans. Electron Devices v.38 no.7 Characteristics of the Emitter Switched Thyristor M. S. Shekar;B. J. Baliga;M. Nandakumar;S. Tandon;A. Reisman https://doi.org/10.1109/16.85158
  4. IEEE Electron Devices Letts. A new MOS-Gated Power Thyristor structure with turn-off achieved by controlling the base resistance M. Nandakumar;B. J. Baliga;M. S. Shekar
  5. Proceeding of International electron Device meeting (IEDN) IGBT Mode Turn-off Thyristor(IGTT) Fabricated on SOI Substrate Tsuneo Ogura;Akio Nakagawa
  6. Proc. IEEE Int. Symp. Power Semiconductor Devices and IC`s A study of EST`s short circuit SOA N. Iwamuro;M. S. Shekar;B. J. Baliga
  7. IEEE Electron Device Lett. v.16 no.9 A new insulated-gate thyristor with turn-off achieved by controlling the base-resistance J.S.Ajit https://doi.org/10.1109/55.406805
  8. IEEE Electron Device Lett. v.17 no.1 The dual gate emitter sitched thyristor (DG-EST) S. Sridhar;B. J. Baliga https://doi.org/10.1109/55.475566
  9. `96 ISPSD The dual gate EST : a new MOS-gated thyristor structure S. Sawant;S. Sridhar;B. J. Baliga
  10. Electron Devices Meeting Dig A new concept for high voltage MCCT with no J-FET resistance by using a very thin wafer N. Iwamuro;T. Iwaana;Y. Harada;Y. Onozawa;Y. Seki
  11. Power Semiconductor Devices B.J.Baliga
  12. 전기학회논문지 v.46 no.11 스냅-백 현상이 억제된 새로운 구조의 Emitter Switched Thyristor 변대석;이병훈;한민구;최연익