Journal of the Institute of Electronics Engineers of Korea SD (대한전자공학회논문지SD)

The Institute of Electronics and Information Engineers (대한전자공학회)
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A Unified Voltage Generator Which Merges the Pumping Capacitor of Boosted Voltage Generator and Substrate Voltage Generator

내부 승압 전원 발생기와 기판 인가 전원 발생기의 펌핑 수단을 공유한 전원 전압 발생기

  • 신동학 (삼성전자 DRAM 설계실) ;
  • 장성진 (삼성전자 DRAM 설계실) ;
  • 전영현 (삼성전자 DRAM 설계실) ;
  • 이칠기 (성균관대학교 정보통신공학부)
  • Published : 2003.11.01
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Abstract

This paper describes a Unified Voltage Generator that merges the pumping capacitors of boosted voltage generator (VPP) and substrate voltage generator (VBB) for DRAM. This unified voltage generator simultaneously supplies VPP and VBB voltages by using one pumping capacitor and one oscillator. The proposed generator is realized by 0.14${\mu}{\textrm}{m}$DRAM process. The generator reduces the power consumption to 30%, the area of total generator to 40% and the area of pumping capacitor to 29.6%, and improves the pumping efficiency to 13.2% at 2.0V supply voltage. In addition, the generator adopts the charge recycling technique for precharging the pumping capacitor during the period of precharge, thatcan reduces the precharge current to 75%.

DRAM에서 사용되는 내부 승압 전원 전압과 기판인가 전원 전압 발생기를 공유함으로써 단일 Charge Pump에서 승압 전원과 기판 전원을 동시에 발생시키는 회로를 설계하였다. 이 회로는 0.14um의 DRAM 공정을 사용하여 기존 보다 전력 소모를 30%, 전체 면적을 40% 그리고 Pumping capacitor 면적을 29.6% 각각 감소하였으며 또한 전류 공급 효율을 13.2% 향상 시켰다. Charge Recycling 기법을 적용하여 Pumping capacitor의 Precharge 구간 동안 소모되는 전류를 75% 감소하였다.

Keywords

References

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