전영역에서 선형 전류 관계를 갖는 일정 트랜스컨덕턴스 연산 증폭기의 설계

A Constant-gm Global Rail-to-Rail Operational Amplifier with Linear Relationship of Currents

  • 발행 : 2000.03.01

초록

본 논문에서는 트랜지스터 동작영역에 독립적인 일정 트랜스컨덕턴스 rail-to-tail 입력회로 및 AB-급 출력회로를 갖는 2단 연산증폭기를 제시한다. rail-to-rail 입력회로는 추가 NMOS 및 PMOS 차동 입력단 구조를 사용하여, 전체 동상 입력 전압에서 항상 일정한 트랜스컨덕턴스를 갖도록 하였다. 이러한 입력단 회로는 기존 MOS의 정확한 전류-전압 관계식을 사용하지 않고, 트랜지스터의 동작영역에서, 즉 강 반전 및 약 반전, 독립적인 새로운 광역 선형 전류관계를 제안한다. 본 논문에서 제안한 입력단 회로를 SPICE를 사용하여 모의실험 결과, 전체 동상 입력 전압에 대해서 4.3%의 변화율이 나타남을 검증하였다. AB-급 출력단 회로는 공급 전압원에 독립적인 일정한 동작 전류값을 갖고, 출력 전압은 Vss+0.1에서 Vdd-0.15까지 구동하는 전압 특성을 나타내었다. 또한 출력단은 AB-급 궤환 제어 방식을 사용하여 저전압에서 동작 할 수 있다. 전체 연산 증폭기의 단일-이득 주파수 및 DC 전압이득 변화율은 각각 4.2% 및 12%로 나타냈다.

The principle and design of two-stage CMOS operational amplifier with rail-to-rail input and class-AB output stage is presented. The rail-to-rail input stage shows almost constant transconductance independent of the common mode input voltage range in global transistor operation region. This new technique does not make use of accurate current-voltage relationship of MOS transistors. Hence it was achieved by using simple linear relationship of currents. The simulated transconductance variation using SPICE is less the 4.3%. The proposed global two-stage opamp can operate both in strong inversion and in weak inversion. Class AB output stage proposed also has a full output voltage swing and a well-defined quiescent current that does not depend on power supply voltage. Since feedback class- AB control is used, it is expected that this output stage can be operating in extremely low voltage. The variation of DC-gain and unity-gain frequency is each 4.2% and 12%, respectively.

키워드

참고문헌

  1. J. H. Huilsing and D. Linebarge, 'Low-Voltage Operational Amplifier with Railto-Rail Input and Output Ranges,' IEEE J. of Solid-State Circuits, vol. SC-20, pp. 1144-1150, 1985 https://doi.org/10.1109/JSSC.1985.1052452
  2. W. C. S. Wu, W. J. Helms, J. A. Kuhn and B. E. Byrkett, 'Digital-Compatible High-Performance operational Amplifier with Rail-to-Rail Input and Output Range,' IEEE J. Of Solid-Stage Circuit, vol. SC-29, no. 12, pp. 15505-1513, 1994
  3. M. D. Pardoen and M. G. Degrauwe, 'A Rail-to-Rail Amplifier Input/Output CMOS Power amplifier,' IEEE J. Solid-State Circuits, vol. SC-25, pp. 501-504, 1990 https://doi.org/10.1109/4.52177
  4. R. Hogervorst, J. P. Tero, R G. H. Eschauzier and J. H. Huijsing, 'A Compact Power-Efficient 3V CMOS Rail-to-Rail Input/Output Operational Amplifier for VLSI Cell Libraries,' IEEE J. Solid-State Circuits, vol. SC-29, pp.1505-1512 1994 https://doi.org/10.1109/4.340424
  5. R. Hogervorst, R. J. Wiegerink, P. AL. de Jong, J Fonderie, R F. Was senaar and J. H. Huijsing, 'CMOS Low-Voltage Operational Amplifiers with Constant-gm Railto-Rail Input Stage,' Analog Integrated Signal Processing, vol. 5, pp.125-146, 1994
  6. R.F.Wassenaar, J.H Huijsing, R.J.Wiegerink, R. Hogervorst, J. P. Tero, 'Differential Amplifier Having Rail - to - Rail Input Capability and Square Root Current ControlM.D. Pardoen and M.G. Degrauwe, IEEE J. of Solid-State Circuits, vol.SC-25, pp. 501-504, (1990),' US patent, patent no. 5,371,474, 1994
  7. R. Hogervorst, J.P.Tero and J. H. Huijsing, 'Compact CMOS Constant-gm Rail-to-Rail Input Stage with gm Control by an Electronic Zener Diode,' Proceedings ESSCIRC, pp. 178-181, 1995
  8. R. Hogervorst, J. P. Tero and J. H. Huijsin, 'Compact CMOS Constant-gm Rail-toRail Input Stage with gm Control by an Electronic Zener Diode,' IEEE J. Solid-State Circuits, vol. SC-31, pp.1035-1040, 1996 https://doi.org/10.1109/4.508218
  9. J. H. Botama, RF.Wassenaar and Wiegerink, 'Simple RaiHo-RaiI Low-Voltage ConstantTransconductance CMOS Input Stage in Weak Inversion,' IEE Electronic Letters, vol.29, p.1145-1147, 1993
  10. P. R Gray, R G. Meyer, 'Analysis and Design of Analog Integrated Circuits,' John Wiley & Sons Inc., New Yark, 1984
  11. R. Hogervarst, and J.H. Huijsing, 'Design of Low-Voltage, Low- Power Operational Amplifier Cells,' . Kluwer Academic Publisher, Boston, 1964
  12. E.Seevinck, W.De Jager and P.Buitenclijk, 'A Low Distorint Output Stage with Improved Stability for Monolithic Power Amplifiers,' IEEE J. Solid-State Circuits, vol. SC-23, pp.794-801, 1988 https://doi.org/10.1109/4.320
  13. W. C. M.Renirie, J. H. Huijsin, 'Simplifier Class-AB Control Circuits for Bipolar Rail-to-Rail Output Stages of Operational Amplifiers,' Proceedings ESSCIRC, pp. 183-186, 1992
  14. 박장우, '일정-gm을 갖는 3V CMOS Rail-to-Rail Opamp의 설계', 제6회 한국반도체학술대회, pp.371-372, 1999