Improved Performance of SVPWM Inverter Based on Novel Dead Time and Voltage Drop Compensation

새로운 데드타임 및 전압강하의 보상을 이용한 SVPWM 인버터의 성능개선

  • Lee, Dong-Hui (Dept.of Electronics Engineering, Busan National University) ;
  • Gwon, Yeong-An (Dept.of Electronics Engineering, Busan National University)
  • 이동희 (부산대 공대 전기공학과) ;
  • 권영안 (부산대 공대 전기공학과)
  • Published : 2000.09.01

Abstract

Recently PWM inverters are widely utilized for many industrial applications e.g. high performance motor drive and PWM techniques are newly developed for an accurate output voltage. Among them space voltage vector PWM(SVPWM) inverter has high voltage ratio and low harmonics compared to the conventional sinusoidal PWM inverter. However output voltage of PWM inverter is distorted and has error duet o the conducting voltage drop of switching devices and the dead time that is inevitable to prevent the shoot-through phenomenon. This paper investigates 3-phase SVPWM inverter which has a new compensation method against dead time and voltage drop. Proposed algorithm calculates gate pulse periods which directly compensates the dead time and nonlinear voltage drop without modification of reference voltages. Direct compensation of gate pulse periods produces exact output voltage and does not need additional circuits. The propose algorithm is verified through the simulation and experiments.

Keywords

References

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