Journal of the Korean Institute of Telematics and Electronics C (전자공학회논문지C)
- Volume 35C Issue 4
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- Pages.21-29
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- 1998
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- 1226-5853(pISSN)
Analysis of timing characteristics of interconnect circuits driven by a CMOS gate
CMOS 게이트에 의해서 구동되는 배선 회로의 타이밍 특성 분석
Abstract
As silicon geometry shrinks into deep submicron and the operating speed icreases, higher accuracy is required in the analysis of the propagation delays of the gates and interconnects in an ASIC. In this paper, the driving characteristics of a CMOS gate is represented by a gatedriver model, consisting of a linear resistor
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