참고문헌
- Jpn. J. Appl. Phys. v.32 no.1B Proposal of Adaptive-Learning Neuron Circuits with Ferroelectric Analog-Memory weights Ishiwara, H.
- J. Appl. Phys. v.72 no.12 Physics of the Ferroelectric Nonvolatile Memory Field Effect Transistor Miller, L.;McWhorter, P.J.
- IEEE Electron Device Lett. v.18 no.4 Nonvolatile Memory Operation of Metal-Ferroelectric-Insulator-Semiconductor (MFIS) FET's Using PLZT/STO/Si(100) Structures Tokumitsu, E.;Nakamura, R.;Ishiwara, H.
- IEEE Trans. Electron Devices v.10 no.9 A New Solid State Memory Resistor Moll, J.L.;Tarui, Y.
- IEEE Trans. Electron Devices v.21 no.8 A New Ferroelectric Memory Device, Metal-Ferroelectric-Semiconductor Transistor Wu, S.Y.
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J. Appl. Phys.
v.46
no.7
Ferroelectric Field-Effect Memory Device Using
$Bi_4Ti_3O_{12}$ film Sugibuchi, K.;Kurogi, Y.;Endo, N. - Proc. International Symposium on the Applications of Ferroelectrics TEX>$LiNbO_3$ Thin Film Capacitor and Transistor Processed by a Novel Method of Photo-Induced Metallo-Organic Decomposition Huang, C.H.J.;Lin, H.;Rabson, T.
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Appl. Phys. Lett.
v.66
no.23
Improvement of the Electrical Properties of Metal-Ferroelectric
$BaMgF_4$ -Silicon Capacitor by Rapid Thermal Annealing Kim, K.H.;Kim, J.D.;Ishiwara, H. - ETRI Journal v.17 no.4 A Novel Body-Tied Silicon-on-Insulator (BTSOI) N-Channel MOSFET with Grounded Body Electrode Kang, W.G.;Lyu, J.S.;Yoo, H.J.
- IEEE Electron Dev. Lett. v.7 no.1 A MOS Transistor with Self-Aligned Polysilicon Source-Drain Huang, T.;Wu, I.W.;Chen, J.Y.
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IEDM Tech. Dig.
A Sub-
$0.1{\mu}m$ Grooved Gate MOSFET with High Immunity to Short-Channel Effect Tanaka, J.;Kimura, S.;Noda, H.;Toyabe, T.;Ihara, S. - IEDM Tech. Dig. New Techniques for the Elimination of the Bird's Head and Bird's Beak Burton, G.;Tuntasood, P.;Chien, F.;Kovacs, R.;Vora, M.
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IEDM Tech. Dig.
Metal-Ferroelectric-Semiconductor Field-Effect Transistor (MFSFET) for Single Transistor Memory by Using Poly-Si Source/Drain and
$BaMgF_4$ Dielectric Lyu, J.S.;Kim, B.W.;Kim, K.H.;Cha, J.Y.;Yoo, H.J.