References
- ISMVL 90 Toward the Age of the Beyond-Binary Electronics and System Kameyama, M.
- Special issue on Multiple-Valued intergrated circuits IEICE TRANS. ELECTRON. v.E76-C no.3 Prospects for multiple-valued intergrated circuits Smith, K.C.;Gulak, P.G.
- IEEE Trans. Comput. v.C-33 Multiple-Valued logic - its status and its future Hurst, S.L.
- IEICE Trans. Electron. v.E76-C no.3 Prospects of Multiple-Valued VLSI Processors Hanyu, T.;Kameyama, M.;Higuchi, T.
- Computer Science and Multiple-Valued Logic Theory and Applications Rine, David C.
- Multiple-Valued Logic: an Introduction Epstein, G.
- ISMVL 92 On the Performance of Multivalued intergrated Circuits: Past. Present and Future Etiemble, D.
- Graph Theory Gould, R.
- GRAPH an Introductory Approach Wilson, R.J.;Watkins, J.J.
- IEEE Trans. Comput. v.C-27 no.6 Binary Decision Diagrams Aker, S.B.
- IEEE Trans. Comput. v.C-35 no.8 Graph-Based Algorithms for Boolean Function manipulations Bryant, R.E.
- IEEE Proc. of Symposium on Multiple-Valued Logic Multiple-Valued Logic Design Tools Miller, D.M.
- IEEE Trans. Comput. v.43 no.10 Efficient Boolean Manipulation with OBDD's can be Extended to FBDD's Gergoy, J.;Meinel, C.
- ISMVL 95 Planar Multiple-Valued Decision Diagrams Sasao, T.;Butler, J.T.
- 電子工學會論文誌 v.32 no.6 決定다이아그램에 의한 多値組合論理시스템 構成에 관한 硏究 朴春明;金興壽
- IEEE 26th proceedings on ISMVL A Method to Represent Multiple-Output Switching Functions by Using Multi-Valued Decision Diagrams Sasao, T.;Butler, Jon T.
- 29th ACM/IEEE Desigh Automation Conference Edge-Valued Binary Decision Diagrams for Multi-Level Hierarchical Verification Lai, Yung-Te;Sastry, Sarma
- IEEE Trans. on Computers v.45 no.2 Formal Verification Using Edge-Valued Binary Decision Diagrams Lai, Yung-Te;Pedram, M.;Vrudhula, S.B.K.
- Modem Logic Design Green, D.
- Discrete and Switching Functions Davio, M.;Deschamps, Jean-Pierre;Thayse, Andre
- Finite Fields for Computer Science and Engineers McEliece, R.J.