CMOS on-chip voltage and current reference circuits for low-voltage applications

저전압용 CMOS 온-칩 기준 전압 및 전류 회로

This paper proposes CMOS on-chip voltage and current reference circuits that operate at supply voltages between 2.5V and 5.5V without using a vonventional bandgap voltage structure. The proposed reference circuits based on enhancement-type MOS transistors show low cost, compatibility with other on-chip MOS circuits, low-power consumption, and small-chip size. The prototype was implemented in a 0.6 um n-well single-poly double-metal CMOS process and occupies an active die area of $710 um \times 190 um$. The proposed voltage reference realizes a mean value of 0.97 V with a standard deviation of $\pm0.39 mV$, and a temperature coefficient of $8.2 ppm/^{\circ}C$ over an extended temeprature range from TEX>$-25^{\circ}C$ to $75^{\circ}C$. A measured PSRR (power supply rejection ratio) is about -67 dB at 50kHz.