전자공학회논문지B (Journal of the Korean Institute of Telematics and Electronics B)
- 제33B권6호
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- Pages.176-185
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- 1996
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- 1016-135X(pISSN)
DigiCipher 등하시스템의 하드웨어 구현방법에 관한 연구
A study on the hardware implementation of the digicipher equalization system
초록
In this paper, we present the modified CMA (constant modulus algorithm) and LMS (least mean square) algorithms for digiCipher system with reduced hardware cost, in which the pipelined architecture is employed. They yield the performance comparable to that using floating-point operations. We show the effecstiveness of the proposed architecture through the implementation results using VHDL.
키워드