Journal of the Korean Institute of Telematics and Electronics B (전자공학회논문지B)
- Volume 32B Issue 8
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- Pages.1085-1090
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- 1995
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- 1016-135X(pISSN)
A Development of a high speed DCT parallel processor
고속 DCT 병렬처리기의 개발
Abstract
The Discrete Cosine Transform(DCT) is effective technique for image compression, which is widely used in the area of digital signal processing. In this paper, an efficient DCT processor is proposed and simulated by using Verilog HDL. This algorithm is improved 60% in processing speed, but it's somewhat complicate compared with Y. Arai's algorithm. This algorithm will be used efficiently for real time image processing.
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