Journal of the Korean Institute of Telematics and Electronics B (전자공학회논문지B)
- Volume 30B Issue 1
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- Pages.1-9
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- 1993
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- 1016-135X(pISSN)
Design of a Graphic Accelerator uisng 1-Dimensional Systolic Array Processor for Matrix.Vector Opertion
행렬 벡터 연사용 1-차원 시스톨릭 어레이 프로세서를 이용한 그래픽 가속기의 설계
Abstract
In recent days high perfermance graphic operation is needed, since computer graphics is widely used for computer-aided design and simulator using high resolution graphic card. In this paper a graphic accelerator is designd with the functions of graphic primitives generation and geometrical transformations. 1-D Systolic Array Processor for Matris Vector operation is designed and used in main ALU of a graphic accelerator, since these graphic algorithms have comonon operation of Matris Vector. Conclusively, in case that the resolution of graphic domain is 800
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