CIF Extraction from Chip Image

CHIP 영상으로부터의 CIF 추출

A series of procedures using image processing techniques is presented for extracting layout information fast and automatically from chip images. CIF (caltech intermediate form) is chosen for representing such information. First, line-edges are extracted using a line-edge detector. Then, thinning and noise removal procedures follow. Subsequent procedures are vertex extraction and vertex grouping. Finally, CIF is extracted from the coordinates of the grouped vertices. In this paper, the final process is applied to only metal layer. In experiments, this processing scheme is shown to be very effective in extracting CIF.