대한전자공학회논문지 (Journal of the Korean Institute of Telematics and Electronics)
- 제24권1호
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- Pages.10-14
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- 1987
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- 1016-135X(pISSN)
베이스 밴드 신호에서 PLL에 대한 지터 해석
Jitter Analysis for the PLL in the Baseband Signal
- 류흥균 (서울대학교 전자공학과) ;
- 안수길 (서울대학교 전자공학과)
- Ryu, Heunggyoon (Dept. of Elec. Eng., Seoul National Univ.) ;
- ANN, Souguil (Dept. of Elec. Eng., Seoul National Univ.)
- 발행 : 1987.01.01
초록
Considering transition gating of the input unipolar NRZ signal, the equivalent linear time-invariant model has been derived for the PLL in the timing clock recovery circuits. The magnitude of the alignment and accumulated jitter has been found along a chain of repeaters. For the timing recovery circuit of 90 Mbps optical communication system, the computer simulation shows that, for the first stage of the chain, the alignment jiter and the accumulated jitter are of -5.1766 dB and for the 7-th stage, the alignment jitter and accumulated jitter have the value of -1.0193dB, 4.9053 dB respectively.
키워드