An Automated Design of CMOS Standard Cells

CMOS 표준셀의 자동설계

  • Kim, Han Heung (Semiconductor Div. II Hyundai Electronics Industries Co., Ltd.) ;
  • Kyung, Chong Min (Dept. of Electrical Eng., KAIST)
  • 김한흥 (현대전자산업(주) 반도체2사업본부) ;
  • 경종민 (한국과학기술원 전기 및 전자공학과)
  • Published : 1986.06.01

Abstract

We present an automated CMOS standard cell design mehtodology which generates a mask description in the CIF (Caltech Intermediate Form)from a user-given logic description and design rule. The resultant layout reflects the user's choice among N-well, P-well and twin-well process and user's decision whether the guard band is to be included or not. Noise margin of each cell was improved by carefully adjusting the channel width of P-FET.

Keywords