Proceedings of the Korean Institute of Information and Commucation Sciences Conference (한국정보통신학회:학술대회논문집)

The Korea Institute of Information and Commucation Engineering (한국정보통신학회)
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Design of a One-Time Programmable Memory Cell for Power Management ICs

Power Management IC용 One-Time Programmable Memory Cell 설계

  • Jeon, Hwang-Gon (Department of Electronic Eng., Changwon National University) ;
  • Yu, Yi-Ning (Department of Electronic Eng., Changwon National University) ;
  • Jin, Li-Yan (Department of Electronic Eng., Changwon National University) ;
  • Kim, Du-Hwi (Department of Electronic Eng., Changwon National University) ;
  • Jang, Ji-Hye (Department of Electronic Eng., Changwon National University) ;
  • Lee, Jae-Hyung (Department of Electronic Eng., Changwon National University) ;
  • Ha, Pan-Bong (Department of Electronic Eng., Changwon National University) ;
  • Kim, Young-Hee (Department of Electronic Eng., Changwon National University)
  • Published : 2010.10.27
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Abstract

We manufacture an antifuse OTP (One-time programmable) cell for analog trimming which will be used in power management ICs. For the antifuse cell using dual program voltage of VPP (=7V) and VNN (=-5V), the thin gate oxide is broken down by applying a voltage higher than the hard break-down voltage to the terminals of the antifuse. The area of the manufactured antifuse OTP cell using $0.18{\mu}m$ BCD process is $48.01{\mu}m^2$ and is about 44.6 percent of that of an eFuse cell. The post-program resistances of the antifuse are good with the values under several kilo ohms when we measure twenty test patterns.

본 논문에서는 power management IC에 사용되는 아날로그 트리밍용 antifuse OTP 셀을 제작하였다. VPP (=7V)와 VNN (=-5V)의 Dual program voltage를 이용하는 antifuse OTP 셀은 antifuse 양단에 hard breakdown 이상의 전압을 인가하여 thin gate oxide를 breakdown시킨다. $0.18{\mu}m$ BCD 공정을 이용하여 제작된 antifuse OTP 셀의 면적은 $48.01{\mu}m^2$으로 eFuse OTP 셀 면적의 44.6% 수준이다. 20개의 테스트 패턴을 측정한 결과 프로그램 후 antifuse의 저항은 수 $k{\Omega}$ 이하로 양호하게 측정되었다.

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