Proceedings of the IEEK Conference (대한전자공학회:학술대회논문집)

The Institute of Electronics and Information Engineers (대한전자공학회)
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Analysis of Via Loss Characteristic in Embedded DPDT Switch Using SoP-L Fabrication

SoP-L 공정을 이용한 DPDT 스위치를 임베딩 할 경우 스위치 특성에 영향을 주는 Via의 loss 분석

  • Mun, Jong-Won (Electronic Materials & Packaging Research Center Korea Electronics Technology Institute) ;
  • Gwon, Eun-Jin (Electronic Materials & Packaging Research Center Korea Electronics Technology Institute) ;
  • Ryu, Jong-In (Electronic Materials & Packaging Research Center Korea Electronics Technology Institute) ;
  • Park, Se-Hoon (Electronic Materials & Packaging Research Center Korea Electronics Technology Institute) ;
  • Kim, Jun-Chul (Electronic Materials & Packaging Research Center Korea Electronics Technology Institute)
  • 문종원 (전자소재패키징연구센터 전자부품연구원) ;
  • 권은진 (전자소재패키징연구센터 전자부품연구원) ;
  • 류종인 (전자소재패키징연구센터 전자부품연구원) ;
  • 박세훈 (전자소재패키징연구센터 전자부품연구원) ;
  • 김준철 (전자소재패키징연구센터 전자부품연구원)
  • Published : 2008.06.18
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Abstract

This paper presents the effects of via losses to be connected with an embedded DPDT(Double Pole Double Thru) in a substrate. The substrate consists of two ABF(Ajinomoto Bonding Film) and a Epoxy core. In order to verify and test effects of via, via chains in a substrate using SoP-L process are proposed and measured. Via loss can be calculated as averaging the total via holes. The exact loss of a DPDT switch embedded in substrate are extracted by using the results of via chain and measured data from embedded DPDT. The calculated one via insertion loss is about 0.0005 dB on basis of measured via chains. This result confirms very low loss in via. So the inserti on loss of the embedded switch is confirmed only switch loss as loss is 0.4 dB.

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