한국전기전자재료학회:학술대회논문집 (Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference)

한국전기전자재료학회 (The Korean Institute of Electrical and Electronic Material Engineers)
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터널링 $SiO_2/Si_3N_4$ 절연막의 적층구조에 따른 비휘발성 메모리 소자의 특성 고찰

Study of Nonvolatile Memory Device with $SiO_2/Si_3N_4$ stacked tunneling oxide

  • 발행 : 2008.06.19
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초록

The electrical characteristics of band-gap engineered tunneling barriers consisting of thin $SiO_2$ and $Si_3N_4$ dielectric layers were investigated. The band structure of stacked tunneling barriers was studied and the effectiveness of these tunneling barriers was compared with that of the conventional tunneling barrier. The band-gap engineered tunneling barriers show the lower operation voltage, faster speed and longer retention time than the conventional $SiO_2$ tunnel barrier. The thickness of each $SiO_2$ and $Si_3N_4$ layer was optimized to improve the performance of non-volatile memory.

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