80nm DRAM의 고압중수소 열처리에 따른 전기적 신뢰성 특성 영향

Effect of High Pressure Deuterium post-annealing Annealing on the Electrical and Reliability properties of 80nm DRAM

  • 장효식 (요업(세라믹)기술원 구조세라믹부 박막단결정실) ;
  • 최균 (요업(세라믹)기술원 구조세라믹부 박막단결정실) ;
  • 서재범 (하이닉스 반도체) ;
  • 홍성주 (하이닉스 반도체) ;
  • 장만 (광주과학기술원) ;
  • 황현상 (광주과학기술원)
  • Chang, Hyo-Sik (Thin Film and Single Crystal Team, KoreaInstitute of Ceramic Engineering and Technolog) ;
  • Cho, Kyoon (Thin Film and Single Crystal Team, KoreaInstitute of Ceramic Engineering and Technolog) ;
  • Suh, Jai-Bum (Hynix Semiconductor Co. Lt.) ;
  • Hong, Sung-Joo (Hynix Semiconductor Co. Lt.) ;
  • Jang, Man (Gwang-ju Institute Science and Technology) ;
  • Hwang, Hyun-Sang (Gwang-ju Institute Science and Technology)
  • 발행 : 2008.11.06

초록

High-pressure deuterium annealing process is proposed and investigated for enhanced electrical and reliability properties of 512Mb DDR2 DRAM without increase in process complexity. High pressure deuterium annealing (HPDA) introduced during post metal anneal (PMA) improves not only DRAM performance but also reliability characteristics of MOSFET. Compared with a control sample annealed in a conventional forming gas, additional annealing in a high pressure deuterium ambient at $400^{\circ}C$ for 30 min decreased G1DL current and junction leakage. The improvements can be explained by deuterium incorporation at $SiO_2$/Si substrate interface near isolation trench edge.

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