Concept of Effective Gate-Source Overlap Length in Invertedstaggered TFT Structures

  • Jung, Keum-Dong (Inter-University Semiconductor Research Center (ISRC) and School of Electrical Engineering, Seoul National University) ;
  • Kim, Yoo-Chul (Inter-University Semiconductor Research Center (ISRC) and School of Electrical Engineering, Seoul National University) ;
  • Kim, Byeong-Ju (Inter-University Semiconductor Research Center (ISRC) and School of Electrical Engineering, Seoul National University) ;
  • Park, Byung-Gook (Inter-University Semiconductor Research Center (ISRC) and School of Electrical Engineering, Seoul National University) ;
  • Shin, Hyung-Cheol (Inter-University Semiconductor Research Center (ISRC) and School of Electrical Engineering, Seoul National University) ;
  • Lee, Jong-Duk (Inter-University Semiconductor Research Center (ISRC) and School of Electrical Engineering, Seoul National University)
  • 발행 : 2007.08.27

초록

Analytic equations are derived from physical quantities in the gate-source overlap region and the concept of effective gate-source overlap length is proposed. The effective overlap length can be affected by gate voltage, insulator thickness and semiconductor thickness, and the overlap length should be larger than the length to obtain maximum driving current.

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