Pentacene Thin Film Transistors Fabricated by High-aspect Ratio Metal Shadow Mask

  • Jin, Sung-Hun (Inter-University Semiconductor Research Center (ISRC) and School of Electrical Engineering) ;
  • Jung, Keum-Dong (Inter-University Semiconductor Research Center (ISRC) and School of Electrical Engineering) ;
  • Shin, Hyung-Chul (Inter-University Semiconductor Research Center (ISRC) and School of Electrical Engineering) ;
  • Park, Byung-Gook (Inter-University Semiconductor Research Center (ISRC) and School of Electrical Engineering) ;
  • Lee, Jong-Duk (Inter-University Semiconductor Research Center (ISRC) and School of Electrical Engineering) ;
  • Yi, Sang-Min (School of Mechanical and Aerospace Engineering, Seoul National University) ;
  • Chu, Chong-Nam (School of Mechanical and Aerospace Engineering, Seoul National University)
  • Published : 2004.08.23

Abstract

The robust and large-area applicable metal shadow masks with a high aspect ratio more than 20 are fabricated by a combination of micro-electro-discharge machining (${\mu}$-EDM) and electro chemical etching (ECE). After defining S/D contacts using a 100 ${\mu}m$ thick stainless steel shadow mask, the top-contact pentacene TFTs with channel length of 5 ${\mu}m$ showed routinely the results of mobility of 0.498 ${\pm}$ 0.05 $cm^2$/Vsec, current on/off ratio of 1.6 ${times}$ $10^5$, and threshold voltage of 0 V. The straightly defined atomic force microscopy (AFM) images of channel area demonstrated that shadow effects caused by the S/D electrode deposition were negligible. The fabricated pentacene TFTs have an average channel length of 5 ${\pm}$ 0.25 ${\mu}m$.

Keywords