Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference (한국전기전자재료학회:학술대회논문집)
- 2004.07a
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- Pages.353-356
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- 2004
Optimization simulation for High Voltage 4H-SiC DiMOSFET fabrication
고전압 4H-SiC DiMOSFET 제작을 위한 최적화 simulation
- Kim, Sang-Cheol (Power Semiconductor Group, KERI) ;
- Bahng, Wook (Power Semiconductor Group, KERI) ;
- Kim, Nam-Kyun (Power Semiconductor Group, KERI) ;
- Kim, Eun-Dong (Power Semiconductor Group, KERI)
- 김상철 (한국전기연구원 전력반도체연구그룹) ;
- 방욱 (한국전기연구원 전력반도체연구그룹) ;
- 김남균 (한국전기연구원 전력반도체연구그룹) ;
- 김은동 (한국전기연구원 전력반도체연구그룹)
- Published : 2004.07.05
Abstract
This paper discribes the analysis of the I-V characteristics of 4H-SiC DiMOSFET with single epi-layer Silicon Carbide has been around for over a century. However, only in the past two to three decades has its semiconducting properties been sufficently studied and applied, especially for high-power and high frequency devices. We present a numerical simulation-based optimization of DiMOSFET using the general-purpose device simulator MINIMIS-NT. For simulation, a loin thick drift layer with doping concentration of