한국정보통신학회:학술대회논문집 (Proceedings of the Korean Institute of Information and Commucation Sciences Conference)
- 한국해양정보통신학회 2004년도 SMICS 2004 International Symposium on Maritime and Communication Sciences
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- Pages.28-31
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- 2004
Quadrature Phase Detector for High Speed Delay-Locked Loop
- Wang, Sung-Ho (RadioPulse Inc., Mokwon University) ;
- Kim, Jung-tae (RadioPulse Inc., Mokwon University) ;
- Hur, Chang-Wu (RadioPulse Inc., Mokwon University)
- 발행 : 2004.05.01
초록
A Quadrature phase detector for high-speed delay-locked loop is introduced. The proposed Quadrature phase detector is composed of two nor gates and it determines if the phase difference of two input clocks is 90 degrees or not. The delay locked loop circuit including the Quadrature phase detector is fabricated in a 0.18 urn standard CMOS process and it operates at 5 ㎓ frequency. The phase error of the delay-locked loop is maximum 2 degrees and the circuits are robust with voltage, temperature variations.
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