Circuit Partitioning Algorithm Using Wire Redundancy Removal Method

This paper presents a new circuit panitioning algorithm using wire redundancy removal. This algorithm consist of the two steps. In the first step. We propose a new IIP(Iterative Improvement Partitioning) technique that selects the method to choice cells according to improvement status using two kinds of bucket structures, the one kept by total gain, and the other by updated gain. In the second step, we select the target wire in the cut-set. We add a alternative wire in the circuit to remove the target wire. For this we use wire redundancy removal and addition method The experimental results on MCNC benchmark circuits show improvement up to $41-50\%$ in cut-size over previous algorithms