높은 펌핑 이득을 갖는 저전압 차지 펌프 설계

Design of Charge Pump with High Pumping Gain

  • 최동권 (한양대학교 전자통신전파공학과) ;
  • 신윤재 (한양대학교 전자통신전파공학과) ;
  • 최향화 (한양대학교 전자통신전파공학과) ;
  • 곽계달 (한양대학교 전자통신전파공학과)
  • Choi Dong-Kwon (Division of Electrical and Computer Engineering, Hanyang University) ;
  • Shin Yoon-Jae (Division of Electrical and Computer Engineering, Hanyang University) ;
  • Cui Xiang-Hwa (Division of Electrical and Computer Engineering, Hanyang University) ;
  • Kwack Kae-Dal (Division of Electrical and Computer Engineering, Hanyang University)
  • 발행 : 2004.06.01

초록

AS supply voltage of DRAM is scaled down, voltage circuit that is stable from external noise is more important. $V_{PP}$ voltage is very important, it is biased to gate of memory cell transistor and possible to read and write without voltage down. It has both high pump gain and high power efficiency therefore charge pump circuit is proposed. The circuit is simulated by 0.18${\mu}m$ memory process and 1.2V supply voltage. Compare to CCTS, it is improved 0.43V of pump gain, $3.06\%$ of power efficiency at 6 stage.

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