Design of Low-Power Digital Matched Filter for IMT-2000 system

IMT-2000용 저전력 디지털 정합 필터의 설계

  • Park Ki Hyun (Dept. of Computer Engineering, Seokyeong University) ;
  • Ha Jin Suk (Dept. of Computer Engineering, Seokyeong University) ;
  • Lee Kwang Yeob (Dept. of Computer Engineering, Seokyeong University) ;
  • Cha Jae Sang (Dept. of Computer Engineering, Seokyeong University)
  • 박기현 (서경대학교 컴퓨터공학과) ;
  • 하진석 (서경대학교 컴퓨터공학과) ;
  • 이광엽 (서경대학교 컴퓨터공학과) ;
  • 차재상 (서경대학교 정보통신공학과)
  • Published : 2004.06.01

Abstract

In wireless communication systems, low-power metrics is becoming a burdensome problem in the portable terminal design, because of portability constraints. This paper presents design architecture of a low-power partial correlation Digital Matched Filter for the IMT-2000 communication systems. The proposed approach focuses on efficient circuit size, power dissipation, maintaining the operating throughput. The proposed architecture was verified by using Xilinx FPGA.

Keywords