Proceedings of the KIEE Conference (대한전기학회:학술대회논문집)
- 2003.11b
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- Pages.79-82
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- 2003
Design of a Low-Power Parallel Multiplier Using Low-Swing Technique
Low-Swing 기술을 이용한 저 전력 병렬 곱셈기 설계
Abstract
This paper describes a new low-swing inverter for low power consumption. To reduce a power consumption, an output voltage swing is in the range from 0 to