Proceedings of the IEEK Conference (대한전자공학회:학술대회논문집)
- 2002.06e
- /
- Pages.87-90
- /
- 2002
A Design of 1V Delta-Sigma Modulator
델타-시그마 변조기의 1V 설계
Abstract
This paper describes design technique of switched-capacitor 1V delta-sigma modulator. To solve the incomplete switching operation at low voltage, bootstrapping technique is used. For PMOS input pair of 1V operational amplifier, simple common mode level down technique is used. Designed 2nd order single loop modulator has an oversampling ratio of 64 and obtains a peak SNR of 71dB, a dynamic range of 73 dB with the power consumption of 350uW at 1V power supply.
Keywords