Study of The SiC CMOS Gate Oxide

SiC CMOS 게이트 산화막에 관한 연구

  • 최재승 (충북대학교 반도체공학과) ;
  • 이원선 (충북대학교 반도체공학과) ;
  • 신동현 (충북대학교 반도체공학과) ;
  • 김영석 (충북대학교 반도체공학과) ;
  • 이형규 (충북대학교 반도체공학과) ;
  • 박근형 (충북대학교 반도체공학과)
  • Published : 2001.06.01

Abstract

In this paper, the thermal oxidation behaviors and the electrical characteristics of the thermal oxide grown on SiC are discussed. For these studies the oxide layers with various thickness were on SiC in wet $O_2$ or dry $O_2$ at l15$0^{\circ}C$ and the MOS capacitors using the 350$\AA$ gate oxide grown in wet $O_2$ were fabricated and electrically characterized. It was found from the experimental results that the oxidation rate of SiC with the Si-face and with the carbon-face were about 10% and 50% of oxidation rate of Si. The C-V measurement results of the SiC oxide showed abnormal hysterisis properties which had ever been not observed for the Si oxide. And the hysterisis behavior was seen more significant when initial bias voltage was more negative or more positive. The hysterisis property of the SiC oxide was believed to be due the substantial amount of the deep level traps to exist at the interface between the oxide and the SiC substrate. The leakage of the SiC oxide was found to be one order larger than the Si oxide, but the breakdown strength was almost equal to that of the Si oxide.

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